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| author |   Ping-Ke Shih <pkshih@realtek.com> | 2022-03-25 14:00:43 +0800 |
|---|---|---|
| committer |   Kalle Valo <kvalo@kernel.org> | 2022-04-06 11:55:13 +0300 |
| commit | 0db862fb025c933675e3efb388eb96da781d6365 (patch) | |
| tree | 7d26dcd8550c7757308b7441d91bc087dd756e49 /tools/perf/scripts/python/stackcollapse.py | |
| parent | rtw89: pci: refine pci pre_init function (diff) | |
rtw89: pci: add LTR setting for v1 chip
Add LTR handle to PCI deinit as well.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220325060055.58482-5-pkshih@realtek.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions