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| author |   Stephen Boyd <sboyd@kernel.org> | 2022-09-28 10:52:14 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 10:52:14 -0700 |
| commit | 3d87f6c3be0df4a0f6d0ca719550a7bc77e520bf (patch) | |
| tree | 45d0b834fe6d03a9009d4be7837e204b21d4cd20 /tools/perf/scripts/python/stackcollapse.py | |
| parent | clk: ingenic-tcu: Properly enable registers before accessing timers (diff) | |
| parent | clk: microchip: mpfs: make the rtc's ahb clock critical (diff) | |
| download | linux-dev-3d87f6c3be0df4a0f6d0ca719550a7bc77e520bf.tar.xz linux-dev-3d87f6c3be0df4a0f6d0ca719550a7bc77e520bf.zip | |
Merge tag 'clk-microchip-fixes-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-fixes
Pull Microchip clock fixes for Polarfire SoCs:
- fix panic at boot in clock initialization when building with clang-15
- make RTC's AHB clock critical as rtc will stop if the AHB
interface clock is disabled
* tag 'clk-microchip-fixes-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
clk: microchip: mpfs: make the rtc's ahb clock critical
clk: microchip: mpfs: fix clk_cfg array bounds violation
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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