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| author |   Hawking Zhang <Hawking.Zhang@amd.com> | 2022-04-06 12:08:12 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-05-04 10:43:54 -0400 |
| commit | 65b462fc7ef97dad2fe99b58f0172a14b8948329 (patch) | |
| tree | 729489bfd48ac5976c516927cd3b7b6faaa111ce /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/amdgpu: enable fgcg for soc21 (diff) | |
drm/amdgpu: enable GENERIC0_INT for gfx/compute pipes
To generate an interrupt to RLC for accessing indirect
registers that CP can not access directly
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions