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| author |   Neil Armstrong <narmstrong@baylibre.com> | 2021-06-03 10:42:15 +0200 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab@kernel.org> | 2022-02-16 12:24:28 +0100 |
| commit | 79e8c421a099bfbcebe59740153e55aa0442ced6 (patch) | |
| tree | c575cb0656280f62c814ee73d912fb8e3dcfd63c /tools/perf/scripts/python/stackcollapse.py | |
| parent | media: s5p_mfc_dec: set flags for OUTPUT coded formats (diff) | |
media: mexon-ge2d: fixup frames size in registers
The CLIP, SRC & DST registers are coded to take the pixel/line start & end,
starting from 0. Thus the end should be the width/height minus 1.
It can be an issue with clipping and rotation, where it will add spurious
lines from uninitialized or unwanted data with a shift in the result.
Fixes: 59a635327ca7 ("media: meson: Add M2M driver for the Amlogic GE2D Accelerator Unit")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions