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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2012-12-05 13:51:19 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-07 11:18:31 -0700 |
| commit | 7508320678b7819ac6aeb89580b8622a424ce586 (patch) | |
| tree | 076a76febea9e199c50e04b1f37283d994b39b12 /tools/perf/scripts/python/syscall-counts.py | |
| parent | PCI/portdrv: Use PCI Express Capability accessors (diff) | |
| download | linux-dev-7508320678b7819ac6aeb89580b8622a424ce586.tar.xz linux-dev-7508320678b7819ac6aeb89580b8622a424ce586.zip | |
PCI: Add standard PCIe Capability Link ASPM field names
Add standard #defines for ASPM fields in PCI Express Link Capability and
Link Control registers.
Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits. PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
the register bit.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions