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author | 2012-03-05 11:49:28 +0000 | |
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committer | 2012-09-17 13:41:58 +0100 | |
commit | b3901d54dc4f73acdc6b7c6e5a7a496d3afeae61 (patch) | |
tree | d7948a9ba283b767beced9f03f4effc26c120304 /tools/perf/scripts/python/syscall-counts.py | |
parent | arm64: MMU fault handling and page table management (diff) | |
download | linux-dev-b3901d54dc4f73acdc6b7c6e5a7a496d3afeae61.tar.xz linux-dev-b3901d54dc4f73acdc6b7c6e5a7a496d3afeae61.zip |
arm64: Process management
The patch adds support for thread creation and context switching. The
context switching CPU specific code is introduced with the CPU support
patch (part of the arch/arm64/mm/proc.S file). AArch64 supports
ASID-tagged TLBs and the ASID can be either 8 or 16-bit wide (detectable
via the ID_AA64AFR0_EL1 register).
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions