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| author |   Alvin Lee <Alvin.Lee2@amd.com> | 2022-10-20 11:46:51 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-11-02 16:51:02 -0400 |
| commit | c3d3f35b725bf9c93bec6d3c056f6bb7cfd27403 (patch) | |
| tree | a11225d0651dad852e11055585a539491737ceac /tools/perf/scripts/python/syscall-counts.py | |
| parent | drm/amd/display: Set memclk levels to be at least 1 for dcn32 (diff) | |
| download | linux-dev-c3d3f35b725bf9c93bec6d3c056f6bb7cfd27403.tar.xz linux-dev-c3d3f35b725bf9c93bec6d3c056f6bb7cfd27403.zip | |
drm/amd/display: Enable timing sync on DCN32
Missed enabling timing sync on DCN32 because DCN32 has a different DML
param.
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions