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| author |   Sachin Kamat <sachin.kamat@linaro.org> | 2012-06-20 16:34:25 +0900 |
|---|---|---|
| committer |   Kukjin Kim <kgene.kim@samsung.com> | 2012-07-13 06:45:55 +0900 |
| commit | c4c713554407a4afa2c1cadcc0f10e199742a4bc (patch) | |
| tree | 93959b3ff4ad5a6111300aea06fccdd2b0a5687f /tools/perf/scripts/python/syscall-counts.py | |
| parent | ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset (diff) | |
| download | linux-dev-c4c713554407a4afa2c1cadcc0f10e199742a4bc.tar.xz linux-dev-c4c713554407a4afa2c1cadcc0f10e199742a4bc.zip | |
ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
Adds clock setting entries for EXYNOS4212 and EXYNOS4412 platforms.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[fixed compilation warning which is reported by Arnd Bergmann]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions