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| author |   Chen-Yu Tsai <wens@csie.org> | 2016-01-21 13:26:41 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-01-25 00:01:21 +0100 |
| commit | 02df9cb85e156924339f2244aec29dcc37d9ab8c (patch) | |
| tree | 52ef35fe3698685775daf6cef53aa2605aa153c8 /tools/perf/scripts/python | |
| parent | ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins (diff) | |
| download | linux-dev-02df9cb85e156924339f2244aec29dcc37d9ab8c.tar.xz linux-dev-02df9cb85e156924339f2244aec29dcc37d9ab8c.zip | |
ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC
mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.
Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions