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authorAlex Deucher <alexander.deucher@amd.com>2012-03-20 17:18:34 -0400
committerDave Airlie <airlied@redhat.com>2012-03-21 06:55:56 +0000
commit0671bdd7983c4df674cd0fce263a44cd87bd36d2 (patch)
tree76a05f91d8c6c6a0a9c9acaf66e8bb1356d8a237 /tools/perf/scripts/python
parentdrm/radeon/kms: disable PPLL0 on DCE6.1 when not in use (diff)
downloadlinux-dev-0671bdd7983c4df674cd0fce263a44cd87bd36d2.tar.xz
linux-dev-0671bdd7983c4df674cd0fce263a44cd87bd36d2.zip
drm/radeon/kms/DCE6.1: ss is not supported on the internal pplls
It's handled via external clock. It should already be protected by the external ss flag, but add an explicit check just in case. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python')
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