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| author |   Fabio Estevam <fabio.estevam@nxp.com> | 2016-02-05 17:44:22 -0200 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2016-02-12 16:16:01 -0600 |
| commit | 32e593b9c7be1a14d42ed288ab68a8e7b41ad873 (patch) | |
| tree | e21a0856d9ae4e1003990ace12c2650d7526f158 /tools/perf/scripts/python | |
| parent | dt-bindings: arm, gic-v3: require that reserved cells are always 0 (diff) | |
| download | linux-dev-32e593b9c7be1a14d42ed288ab68a8e7b41ad873.tar.xz linux-dev-32e593b9c7be1a14d42ed288ab68a8e7b41ad873.zip | |
serial: fsl-imx-uart: Fix typo in fsl,dte-mode description
We should say "The uart works in DCE mode".
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions