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| author |   Damien Lespiau <damien.lespiau@intel.com> | 2015-06-04 18:21:31 +0100 |
|---|---|---|
| committer |   Jani Nikula <jani.nikula@intel.com> | 2015-06-12 13:14:36 +0300 |
| commit | 414355a7c3f029b762518d73a6ea7e4d07d48e34 (patch) | |
| tree | 467a071fffe91d21ba36588a71306e2663f82c92 /tools/perf/scripts/python | |
| parent | drm/i915/skl: Derive the max CDCLK from DFSM (diff) | |
drm/i915/skl: Don't warn if reading back DPLL0 is disabled
We can operate with DPLL0 off with CDCLK backed by the 24Mhz reference
clock, and that's a supported configuration. Don't warn when notice
DPLL0 is off then.
We still have a separate warn at boot if cdclk is disabled (because we
don't currently try to handle the case (that shouldn't happen on SKL as
far as I know) where we boot with display not initialized.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions