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| author |   Will Deacon <will.deacon@arm.com> | 2011-03-25 13:13:34 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2011-03-26 10:06:09 +0000 |
| commit | 574b69cbb633037a9c305d2993aeb680f4a8badd (patch) | |
| tree | 8fcef55167b8750eeaebffca51b937a993842136 /tools/perf/scripts/python | |
| parent | ARM: 6833/1: perf: add required isbs() to ARMv7 backend (diff) | |
| download | linux-dev-574b69cbb633037a9c305d2993aeb680f4a8badd.tar.xz linux-dev-574b69cbb633037a9c305d2993aeb680f4a8badd.zip | |
ARM: 6834/1: perf: reset counters on all CPUs during initialisation
ARMv7 dictates that the interrupt-enable and count-enable registers for
each PMU counter are UNKNOWN following core reset.
This patch adds a new (optional) function pointer to struct arm_pmu for
resetting the PMU state during init. The reset function is called on
each CPU via an arch_initcall in the generic ARM perf_event code and
allows the PMU backend to write sane values to any UNKNOWN registers.
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions