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| author | 2021-05-21 17:29:53 +0800 | |
|---|---|---|
| committer | 2021-05-28 20:13:57 -0300 | |
| commit | 5e6370d7cc75134b0eb5b15916aab40b628db9e1 (patch) | |
| tree | 03c026a0e79af755bf526f83a3bd41d11d36ef22 /tools/perf/scripts/python | |
| parent | RDMA/hns: Refactor root BT allocation for MTR (diff) | |
RDMA/hns: Fix wrong timer context buffer page size
The HEM page size for QPC timer and CQC timer is always 4K and there's no
need to calculate a different size by the hns driver, otherwise the ROCEE
may access an invalid address.
Fixes: 719d13415f59 ("RDMA/hns: Remove duplicated hem page size config code")
Link: https://lore.kernel.org/r/1621589395-2435-4-git-send-email-liweihang@huawei.com
Signed-off-by: Xi Wang <wangxi11@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
