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| author |   Xinyun Liu <xinyun.liu@intel.com> | 2018-09-19 15:28:53 +0800 |
|---|---|---|
| committer |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-10-31 17:09:01 +0800 |
| commit | 606a745944bc0ebd14f77dfc61ac7d6cb685cefe (patch) | |
| tree | 02011252f52e6dab288f4917d7c4f6375aba2f64 /tools/perf/scripts/python | |
| parent | drm/i915/gvt: support inconsecutive partial gtt entry write (diff) | |
| download | linux-dev-606a745944bc0ebd14f77dfc61ac7d6cb685cefe.tar.xz linux-dev-606a745944bc0ebd14f77dfc61ac7d6cb685cefe.zip | |
drm/i915/gvt: correct mask setting for CSFE_CHICKEN1
CSFE_CHICKEN1(0x20d4) needs access with mask. This is caught in AcrnGT
conformance check test:
[drm:intel_gvt_vgpu_conformance_check]
*ERROR* gvt: vgpu1 unconformance mmio 0x20d4:0x40004,0x4
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions