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| author | 2010-01-15 17:36:48 +0100 | |
|---|---|---|
| committer | 2010-01-15 17:28:41 +0000 | |
| commit | 6aababdf20bb8892023bb8df136514d7679e4959 (patch) | |
| tree | 4919145129a8b76b5bd94046da3b2a73beab4fdb /tools/perf/scripts/python | |
| parent | ASoC: TWL4030: Fix typo in comment in header file (diff) | |
ASoC: cs4270: allow passing freq=0 in set_dai_sysclk()
For setups with variable MCLKs, the current logic of limiting the
available sampling rates at startup time is not sufficient. We need to
be able to change the setting at a later point, and so the codec must
offer all possible rates until the hw_params are given.
This patches allows that by passing 0 as 'freq' argument to
cs4270_set_dai_sysclk().
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
