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authorSung Lee <sung.lee@amd.com>2020-01-20 18:58:45 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-02-06 15:04:37 -0500
commit84fc79899ee7a20b65e91b533b63530141896f8c (patch)
treef83f355ff42c37fbbe40053e62ae920b01c357c7 /tools/perf/scripts/python
parentdrm/amd/display: add stream_enc_inst for PSP HDCP inst use (diff)
drm/amd/display: Use dcfclk to populate watermark ranges
[WHY & HOW] Previously drain clk was unconstrained and fill clk was constrained on fclk. We want to change it to fill clk unconstrained and drain clock constrained to dcfclk. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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