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| author |   Mika Westerberg <mika.westerberg@linux.intel.com> | 2022-08-16 15:55:37 +0300 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2022-08-22 14:07:30 +0100 |
| commit | 1d895be13af0d962bef67ba0ceaefbdc6954fe67 (patch) | |
| tree | a1ac71239cac7378cd8ed1f7af7ca0bb8f49ad74 /tools/perf/util/include/linux/git:/ssh:/git@git.zx2c4.com | |
| parent | spi: intel: Add support for second flash chip (diff) | |
| download | linux-dev-1d895be13af0d962bef67ba0ceaefbdc6954fe67.tar.xz linux-dev-1d895be13af0d962bef67ba0ceaefbdc6954fe67.zip | |
spi: intel: 64k erase is supported from Canon Lake and beyond
The hardware sequencer in Intel Canon Lake and beyond supports also 64k
erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery
Parameter) to figure out what the chip actually supports and only issues
64k erase if it is supported.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/util/include/linux/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions