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| author |   Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-04 13:52:49 +0100 |
|---|---|---|
| committer |   Abel Vesa <abel.vesa@nxp.com> | 2022-03-04 17:06:30 +0200 |
| commit | 485b4ff57c2777c15bfe2e6e6a204200b040e131 (patch) | |
| tree | c903154a12653d4716d9e2dc1451c87cfb91a107 /tools/perf/util/include/linux/git:/ssh:/git@git.zx2c4.com | |
| parent | clk: imx8mp: remove SYS PLL 1/2 clock gates (diff) | |
| download | linux-dev-485b4ff57c2777c15bfe2e6e6a204200b040e131.tar.xz linux-dev-485b4ff57c2777c15bfe2e6e6a204200b040e131.zip | |
clk: imx: pll14xx: Use register defines consistently
The driver has defines for the registers, but they are mostly unused.
Use the defines consistently throughout the driver. While at it rename
DIV_CTL to DIV_CTL0 because that's the name in the reference manual.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-2-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'tools/perf/util/include/linux/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions