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| author |   Len Brown <len.brown@intel.com> | 2017-01-21 01:15:09 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2017-03-01 00:14:04 -0500 |
| commit | 98af74599ea0757098a5776ea29e581b661dcf6f (patch) | |
| tree | 7ff03bde40b22312ef759a72fbe69185cfbea74d /tools/power | |
| parent | tools/power turbostat: decode CPUID(6).TURBO (diff) | |
| download | linux-dev-98af74599ea0757098a5776ea29e581b661dcf6f.tar.xz linux-dev-98af74599ea0757098a5776ea29e581b661dcf6f.zip | |
x86 msr_index.h: Define MSR_MISC_FEATURE_CONTROL
This non-architectural MSR has disable bits
for various prefetchers on modern processors.
While these bits are generally touched only by the BIOS,
say, via BIOS SETUP, it is useful to dump them
when examining options that can alter performance.
Cc: x86@kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
0 files changed, 0 insertions, 0 deletions