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| author |   Zong Li <zong.li@sifive.com> | 2022-09-13 06:18:13 +0000 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-13 11:06:52 -0700 |
| commit | 95f196f3212bbc258611c22865aef12b98304e1d (patch) | |
| tree | 321d5ce09cc0b5df627463d0b0d942963ec518f0 /tools/scripts/ssh:/git@git.zx2c4.com/git: | |
| parent | soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. (diff) | |
| download | linux-dev-95f196f3212bbc258611c22865aef12b98304e1d.tar.xz linux-dev-95f196f3212bbc258611c22865aef12b98304e1d.zip | |
soc: sifive: ccache: determine the cache level from dts
Composable cache could be L2 or L3 cache, use 'cache-level' property of
device node to determine the level.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220913061817.22564-4-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/scripts/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions