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| author |   Yassine Oudjana <y.oudjana@protonmail.com> | 2022-08-13 09:32:49 +0100 |
|---|---|---|
| committer |   Chen-Yu Tsai <wenst@chromium.org> | 2022-09-26 15:05:29 +0800 |
| commit | 5066c9acf5656fb96fed2cff646fe312e9a2962f (patch) | |
| tree | ab024683be4369da43fc3e7feec5e2600bf4b4f2 /tools/scripts/ssh:/git@git.zx2c4.com | |
| parent | clk: mediatek: add VDOSYS1 clock (diff) | |
| download | linux-dev-5066c9acf5656fb96fed2cff646fe312e9a2962f.tar.xz linux-dev-5066c9acf5656fb96fed2cff646fe312e9a2962f.zip | |
clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
This allows it to be used in drivers built as modules.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220813083249.45427-1-y.oudjana@protonmail.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Diffstat (limited to 'tools/scripts/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions