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authorChristoffer Dall <christoffer.dall@linaro.org>2015-11-24 10:31:07 +0100
committerChristoffer Dall <christoffer.dall@linaro.org>2015-11-24 18:04:00 +0100
commit7e16aa81f9f6a7cfe2287b788a7d62abc2880185 (patch)
tree5d4d96d9b0506cff5ac98401d07d2d30abc94e2d /virt
parentarm64: KVM: Add workaround for Cortex-A57 erratum 834220 (diff)
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KVM: arm/arm64: Fix preemptible timer active state crazyness
We were setting the physical active state on the GIC distributor in a preemptible section, which could cause us to set the active state on different physical CPU from the one we were actually going to run on, hacoc ensues. Since we are no longer descheduling/scheduling soft timers in the flush/sync timer functions, simply moving the timer flush into a non-preemptible section. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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