diff options
| -rw-r--r-- | arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi | 33 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi | 19 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap3xxx-clocks.dtsi | 52 |
3 files changed, 63 insertions, 41 deletions
diff --git a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi index b6316be894ce..edc28654d158 100644 --- a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi @@ -148,20 +148,27 @@ clock-div = <1>; }; - sr1_fck: sr1_fck@c00 { - #clock-cells = <0>; - compatible = "ti,wait-gate-clock"; - clocks = <&sys_ck>; - reg = <0x0c00>; - ti,bit-shift = <6>; - }; + clock@c00 { + compatible = "ti,clksel"; + reg = <0xc00>; + #clock-cells = <2>; + #address-cells = <0>; - sr2_fck: sr2_fck@c00 { - #clock-cells = <0>; - compatible = "ti,wait-gate-clock"; - clocks = <&sys_ck>; - reg = <0x0c00>; - ti,bit-shift = <7>; + sr1_fck: clock-sr1-fck { + #clock-cells = <0>; + compatible = "ti,wait-gate-clock"; + clock-output-names = "sr1_fck"; + clocks = <&sys_ck>; + ti,bit-shift = <6>; + }; + + sr2_fck: clock-sr2-fck { + #clock-cells = <0>; + compatible = "ti,wait-gate-clock"; + clock-output-names = "sr2_fck"; + clocks = <&sys_ck>; + ti,bit-shift = <7>; + }; }; sr_l4_ick: sr_l4_ick { diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi index c6ab51a36f39..7c25739d5612 100644 --- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi +++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi @@ -81,12 +81,19 @@ clock-div = <1>; }; - usim_gate_fck: usim_gate_fck@c00 { - #clock-cells = <0>; - compatible = "ti,composite-gate-clock"; - clocks = <&omap_96m_fck>; - ti,bit-shift = <9>; - reg = <0x0c00>; + clock@c00 { + compatible = "ti,clksel"; + reg = <0xc00>; + #clock-cells = <2>; + #address-cells = <0>; + + usim_gate_fck: clock-usim-gate-fck { + #clock-cells = <0>; + compatible = "ti,composite-gate-clock"; + clock-output-names = "usim_gate_fck"; + clocks = <&omap_96m_fck>; + ti,bit-shift = <9>; + }; }; sys_d2_ck: sys_d2_ck { diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi index 430dca208dc8..2cb77eb15eae 100644 --- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi +++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi @@ -1021,12 +1021,36 @@ clock-frequency = <0>; }; - gpt1_gate_fck: gpt1_gate_fck@c00 { - #clock-cells = <0>; - compatible = "ti,composite-gate-clock"; - clocks = <&sys_ck>; - ti,bit-shift = <0>; - reg = <0x0c00>; + /* CM_FCLKEN_WKUP */ + clock@c00 { + compatible = "ti,clksel"; + reg = <0xc00>; + #clock-cells = <2>; + #address-cells = <0>; + + gpt1_gate_fck: clock-gpt1-gate-fck { + #clock-cells = <0>; + compatible = "ti,composite-gate-clock"; + clock-output-names = "gpt1_gate_fck"; + clocks = <&sys_ck>; + ti,bit-shift = <0>; + }; + + gpio1_dbck: clock-gpio1-dbck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clock-output-names = "gpio1_dbck"; + clocks = <&wkup_32k_fck>; + ti,bit-shift = <3>; + }; + + wdt2_fck: clock-wdt2-fck { + #clock-cells = <0>; + compatible = "ti,wait-gate-clock"; + clock-output-names = "wdt2_fck"; + clocks = <&wkup_32k_fck>; + ti,bit-shift = <5>; + }; }; gpt1_mux_fck: gpt1_mux_fck@c40 { @@ -1050,22 +1074,6 @@ clock-div = <1>; }; - gpio1_dbck: gpio1_dbck@c00 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&wkup_32k_fck>; - reg = <0x0c00>; - ti,bit-shift = <3>; - }; - - wdt2_fck: wdt2_fck@c00 { - #clock-cells = <0>; - compatible = "ti,wait-gate-clock"; - clocks = <&wkup_32k_fck>; - reg = <0x0c00>; - ti,bit-shift = <5>; - }; - wdt2_ick: wdt2_ick@c10 { #clock-cells = <0>; compatible = "ti,omap3-interface-clock"; |