diff options
| -rw-r--r-- | arch/arm/boot/dts/omap3xxx-clocks.dtsi | 42 |
1 files changed, 25 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi index 5a192fc149c0..30f6847ef65e 100644 --- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi +++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi @@ -393,14 +393,31 @@ }; }; - dpll4_m3_ck: dpll4_m3_ck@e40 { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clocks = <&dpll4_ck>; - ti,bit-shift = <8>; - ti,max-div = <32>; - reg = <0x0e40>; - ti,index-starts-at-one; + /* CM_CLKSEL_DSS */ + clock@e40 { + compatible = "ti,clksel"; + reg = <0xe40>; + #clock-cells = <2>; + #address-cells = <0>; + + dpll4_m3_ck: clock-dpll4-m3 { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clock-output-names = "dpll4_m3_ck"; + clocks = <&dpll4_ck>; + ti,bit-shift = <8>; + ti,max-div = <32>; + ti,index-starts-at-one; + }; + + dpll4_m4_ck: clock-dpll4-m4 { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clock-output-names = "dpll4_m4_ck"; + clocks = <&dpll4_ck>; + ti,max-div = <16>; + ti,index-starts-at-one; + }; }; dpll4_m3x2_mul_ck: dpll4_m3x2_mul_ck { @@ -436,15 +453,6 @@ clock-div = <4>; }; - dpll4_m4_ck: dpll4_m4_ck@e40 { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clocks = <&dpll4_ck>; - ti,max-div = <16>; - reg = <0x0e40>; - ti,index-starts-at-one; - }; - dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck { #clock-cells = <0>; compatible = "ti,fixed-factor-clock"; |