aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/staging/wilc1000/wilc_wlan.c26
-rw-r--r--drivers/staging/wilc1000/wilc_wlan.h10
2 files changed, 2 insertions, 34 deletions
diff --git a/drivers/staging/wilc1000/wilc_wlan.c b/drivers/staging/wilc1000/wilc_wlan.c
index 2bbb359d2119..771d8cb68dc1 100644
--- a/drivers/staging/wilc1000/wilc_wlan.c
+++ b/drivers/staging/wilc1000/wilc_wlan.c
@@ -758,26 +758,6 @@ static void wilc_unknown_isr_ext(struct wilc *wilc)
wilc->hif_func->hif_clear_int_ext(wilc, 0);
}
-static void wilc_pllupdate_isr_ext(struct wilc *wilc, u32 int_stats)
-{
- int trials = 10;
-
- wilc->hif_func->hif_clear_int_ext(wilc, PLL_INT_CLR);
-
- if (wilc->io_type == WILC_HIF_SDIO)
- mdelay(WILC_PLL_TO_SDIO);
- else
- mdelay(WILC_PLL_TO_SPI);
-
- while (!(is_wilc1000(wilc_get_chipid(wilc, true)) && --trials))
- mdelay(1);
-}
-
-static void wilc_sleeptimer_isr_ext(struct wilc *wilc, u32 int_stats1)
-{
- wilc->hif_func->hif_clear_int_ext(wilc, SLEEP_INT_CLR);
-}
-
static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status)
{
u32 offset = wilc->rx_buffer_offset;
@@ -827,15 +807,9 @@ void wilc_handle_isr(struct wilc *wilc)
acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP);
wilc->hif_func->hif_read_int(wilc, &int_status);
- if (int_status & PLL_INT_EXT)
- wilc_pllupdate_isr_ext(wilc, int_status);
-
if (int_status & DATA_INT_EXT)
wilc_wlan_handle_isr_ext(wilc, int_status);
- if (int_status & SLEEP_INT_EXT)
- wilc_sleeptimer_isr_ext(wilc, int_status);
-
if (!(int_status & (ALL_INT_EXT)))
wilc_unknown_isr_ext(wilc);
diff --git a/drivers/staging/wilc1000/wilc_wlan.h b/drivers/staging/wilc1000/wilc_wlan.h
index f566d040bb72..7469fa47d588 100644
--- a/drivers/staging/wilc1000/wilc_wlan.h
+++ b/drivers/staging/wilc1000/wilc_wlan.h
@@ -128,8 +128,6 @@
#define WILC_CFG_RSP_STATUS 2
#define WILC_CFG_RSP_SCAN 3
-#define WILC_PLL_TO_SDIO 4
-#define WILC_PLL_TO_SPI 2
#define WILC_ABORT_REQ_BIT BIT(31)
#define WILC_RX_BUFF_SIZE (96 * 1024)
@@ -185,14 +183,10 @@
#define EN_VMM BIT(8)
#define DATA_INT_EXT INT_0
-#define PLL_INT_EXT INT_1
-#define SLEEP_INT_EXT INT_2
-#define ALL_INT_EXT (DATA_INT_EXT | PLL_INT_EXT | SLEEP_INT_EXT)
-#define NUM_INT_EXT 3
+#define ALL_INT_EXT DATA_INT_EXT
+#define NUM_INT_EXT 1
#define DATA_INT_CLR CLR_INT0
-#define PLL_INT_CLR CLR_INT1
-#define SLEEP_INT_CLR CLR_INT2
#define ENABLE_RX_VMM (SEL_VMM_TBL1 | EN_VMM)
#define ENABLE_TX_VMM (SEL_VMM_TBL0 | EN_VMM)