diff options
Diffstat (limited to 'Documentation/xtensa/mmu.txt')
| -rw-r--r-- | Documentation/xtensa/mmu.txt | 49 |
1 files changed, 22 insertions, 27 deletions
diff --git a/Documentation/xtensa/mmu.txt b/Documentation/xtensa/mmu.txt index 867c0f837e28..222a2c6748e6 100644 --- a/Documentation/xtensa/mmu.txt +++ b/Documentation/xtensa/mmu.txt @@ -3,15 +3,8 @@ MMUv3 initialization sequence. The code in the initialize_mmu macro sets up MMUv3 memory mapping identically to MMUv2 fixed memory mapping. Depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX symbol this code is -located in one of the following address ranges: - - 0xF0000000..0xFFFFFFFF (will keep same address in MMU v2 layout; - typically ROM) - 0x00000000..0x07FFFFFF (system RAM; this code is actually linked - at 0xD0000000..0xD7FFFFFF [cached] - or 0xD8000000..0xDFFFFFFF [uncached]; - in any case, initially runs elsewhere - than linked, so have to be careful) +located in addresses it was linked for (symbol undefined), or not +(symbol defined), so it needs to be position-independent. The code has the following assumptions: This code fragment is run only on an MMU v3. @@ -28,24 +21,26 @@ TLB setup proceeds along the following steps. PA = physical address (two upper nibbles of it); pc = physical range that contains this code; -After step 2, we jump to virtual address in 0x40000000..0x5fffffff -that corresponds to next instruction to execute in this code. -After step 4, we jump to intended (linked) address of this code. - - Step 0 Step1 Step 2 Step3 Step 4 Step5 - ============ ===== ============ ===== ============ ===== - VA PA PA VA PA PA VA PA PA - ------ -- -- ------ -- -- ------ -- -- - E0..FF -> E0 -> E0 E0..FF -> E0 F0..FF -> F0 -> F0 - C0..DF -> C0 -> C0 C0..DF -> C0 E0..EF -> F0 -> F0 - A0..BF -> A0 -> A0 A0..BF -> A0 D8..DF -> 00 -> 00 - 80..9F -> 80 -> 80 80..9F -> 80 D0..D7 -> 00 -> 00 - 60..7F -> 60 -> 60 60..7F -> 60 - 40..5F -> 40 40..5F -> pc -> pc 40..5F -> pc - 20..3F -> 20 -> 20 20..3F -> 20 - 00..1F -> 00 -> 00 00..1F -> 00 - -The default location of IO peripherals is above 0xf0000000. This may change +After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff +or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below +0x40000000 or above. That address corresponds to next instruction to execute +in this code. After step 4, we jump to intended (linked) address of this code. +The scheme below assumes that the kernel is loaded below 0x40000000. + + Step0 Step1 Step2 Step3 Step4 Step5 + ===== ===== ===== ===== ===== ===== + VA PA PA PA PA VA PA PA + ------ -- -- -- -- ------ -- -- + E0..FF -> E0 -> E0 -> E0 F0..FF -> F0 -> F0 + C0..DF -> C0 -> C0 -> C0 E0..EF -> F0 -> F0 + A0..BF -> A0 -> A0 -> A0 D8..DF -> 00 -> 00 + 80..9F -> 80 -> 80 -> 80 D0..D7 -> 00 -> 00 + 60..7F -> 60 -> 60 -> 60 + 40..5F -> 40 -> pc -> pc 40..5F -> pc + 20..3F -> 20 -> 20 -> 20 + 00..1F -> 00 -> 00 -> 00 + +The default location of IO peripherals is above 0xf0000000. This may be changed using a "ranges" property in a device tree simple-bus node. See ePAPR 1.1, ยง6.5 for details on the syntax and semantic of simple-bus nodes. The following limitations apply: |