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Diffstat (limited to 'arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi')
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi96
1 files changed, 69 insertions, 27 deletions
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index a813a0cf3ff3..994e69ab38d7 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -1,12 +1,13 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am5728.dtsi"
#include "am57xx-commercial-grade.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
+#include "dra74-ipu-dsp-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
@@ -50,6 +51,40 @@
regulator-boot-on;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ipu2_memory_region: ipu2-memory@95800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x95800000 0x0 0x3800000>;
+ reusable;
+ status = "okay";
+ };
+
+ dsp1_memory_region: dsp1-memory@99000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x99000000 0x0 0x4000000>;
+ reusable;
+ status = "okay";
+ };
+
+ ipu1_memory_region: ipu1-memory@9d000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x9d000000 0x0 0x2000000>;
+ reusable;
+ status = "okay";
+ };
+
+ dsp2_memory_region: dsp2-memory@9f000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x9f000000 0x0 0x800000>;
+ reusable;
+ status = "okay";
+ };
+ };
+
vdd_3v3: fixedregulator-vdd_3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
@@ -416,7 +451,7 @@
<&dra7_pmx_core 0x3f8>;
};
-&davinci_mdio {
+&davinci_mdio_sw {
phy0: ethernet-phy@1 {
reg = <1>;
};
@@ -426,21 +461,20 @@
};
};
-&mac {
+&mac_sw {
status = "okay";
- dual_emac;
};
-&cpsw_emac0 {
+&cpsw_port1 {
phy-handle = <&phy0>;
- phy-mode = "rgmii";
- dual_emac_res_vlan = <1>;
+ phy-mode = "rgmii-rxid";
+ ti,dual-emac-pvid = <1>;
};
-&cpsw_emac1 {
+&cpsw_port2 {
phy-handle = <&phy1>;
- phy-mode = "rgmii";
- dual_emac_res_vlan = <2>;
+ phy-mode = "rgmii-rxid";
+ ti,dual-emac-pvid = <2>;
};
&mmc1 {
@@ -547,13 +581,13 @@
};
&dss {
- status = "ok";
+ status = "okay";
vdda_video-supply = <&ldoln_reg>;
};
&hdmi {
- status = "ok";
+ status = "okay";
vdda-supply = <&ldo4_reg>;
port {
@@ -564,7 +598,7 @@
};
&pcie1_rc {
- status = "ok";
+ status = "okay";
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
};
@@ -584,22 +618,30 @@
rx-num-evt = <32>;
};
-&mailbox5 {
+&ipu2 {
status = "okay";
- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
- status = "okay";
- };
- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
- status = "okay";
- };
+ memory-region = <&ipu2_memory_region>;
};
-&mailbox6 {
+&ipu1 {
status = "okay";
- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
- status = "okay";
- };
- mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
- status = "okay";
- };
+ memory-region = <&ipu1_memory_region>;
+};
+
+&dsp1 {
+ status = "okay";
+ memory-region = <&dsp1_memory_region>;
+};
+
+&dsp2 {
+ status = "okay";
+ memory-region = <&dsp2_memory_region>;
+};
+
+&pruss1_mdio {
+ status = "disabled";
+};
+
+&pruss2_mdio {
+ status = "disabled";
};