diff options
Diffstat (limited to 'arch/arm/boot/dts/bcm2836.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm2836.dtsi | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi index 82d6c4662ae4..534dacfc4dd5 100644 --- a/arch/arm/boot/dts/bcm2836.dtsi +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm283x.dtsi" #include "bcm2835-common.dtsi" +#include "bcm2835-rpi-common.dtsi" / { compatible = "brcm,bcm2836"; @@ -40,11 +41,26 @@ #size-cells = <0>; enable-method = "brcm,bcm2836-smp"; + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/ddi0464/f/L1-Memory-System + * /About-the-L1-memory-system?lang=en + * + * Source for d/i-cache-size + * https://forums.raspberrypi.com/viewtopic.php?t=98428 + */ + v7_cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf00>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu1: cpu@1 { @@ -52,6 +68,13 @@ compatible = "arm,cortex-a7"; reg = <0xf01>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu2: cpu@2 { @@ -59,6 +82,13 @@ compatible = "arm,cortex-a7"; reg = <0xf02>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu3: cpu@3 { @@ -66,6 +96,27 @@ compatible = "arm,cortex-a7"; reg = <0xf03>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; + }; + + /* Source for cache-line-size + cache-sets + * https://developer.arm.com/documentation/ddi0464/f/L2-Memory-System + * /About-the-L2-Memory-system?lang=en + * Source for cache-size + * https://forums.raspberrypi.com/viewtopic.php?t=98428 + */ + l2: l2-cache0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; }; }; }; |