diff options
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index f4b9da65bc0f..7a24fee1e7ae 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -298,6 +298,7 @@ }; ssi1: ssi@02028000 { + #sound-dai-cells = <0>; compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi"; reg = <0x02028000 0x4000>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; @@ -311,6 +312,7 @@ }; ssi2: ssi@0202c000 { + #sound-dai-cells = <0>; compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi"; reg = <0x0202c000 0x4000>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; @@ -324,6 +326,7 @@ }; ssi3: ssi@02030000 { + #sound-dai-cells = <0>; compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi"; reg = <0x02030000 0x4000>; interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; @@ -418,7 +421,7 @@ reg = <0x02098000 0x4000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_GPT_BUS>, - <&clks IMX6SX_CLK_GPT_SERIAL>; + <&clks IMX6SX_CLK_GPT_3M>; clock-names = "ipg", "per"; }; @@ -668,6 +671,12 @@ reg = <0x34 0x58>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; }; + + snvs_poweroff: snvs-poweroff@38 { + compatible = "fsl,sec-v4.0-poweroff"; + reg = <0x38 0x4>; + status = "disabled"; + }; }; epit1: epit@020d0000 { @@ -776,6 +785,8 @@ <&clks IMX6SX_CLK_ENET_PTP>; clock-names = "ipg", "ahb", "ptp", "enet_clk_ref", "enet_out"; + fsl,num-tx-queues=<3>; + fsl,num-rx-queues=<3>; status = "disabled"; }; @@ -872,7 +883,7 @@ }; fec2: ethernet@021b4000 { - compatible = "fsl,imx6sx-fec"; + compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec"; reg = <0x021b4000 0x4000>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; @@ -1062,6 +1073,7 @@ }; lcdif1: lcdif@02220000 { + compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif"; reg = <0x02220000 0x4000>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>, @@ -1072,6 +1084,7 @@ }; lcdif2: lcdif@02224000 { + compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif"; reg = <0x02224000 0x4000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>, |