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Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8084.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi44
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 52240fc7a1a6..f2fb7c975af8 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -95,7 +95,7 @@
firmware {
scm {
- compatible = "qcom,scm";
+ compatible = "qcom,scm-apq8084", "qcom,scm";
clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
clock-names = "core", "bus", "iface";
};
@@ -239,11 +239,16 @@
reg = <0xf9011000 0x1000>;
};
+ sram@fc190000 {
+ compatible = "qcom,apq8084-rpm-stats";
+ reg = <0xfc190000 0x10000>;
+ };
+
qfprom: qfprom@fc4bc000 {
+ compatible = "qcom,apq8084-qfprom", "qcom,qfprom";
+ reg = <0xfc4bc000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
- compatible = "qcom,qfprom";
- reg = <0xfc4bc000 0x1000>;
tsens_calib: calib@d0 {
reg = <0xd0 0x18>;
};
@@ -383,14 +388,9 @@
reg = <0xfc400000 0x4000>;
};
- tcsr_mutex_regs: syscon@fd484000 {
- compatible = "syscon";
- reg = <0xfd484000 0x2000>;
- };
-
- tcsr_mutex: hwlock {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_regs 0 0x80>;
+ tcsr_mutex: hwlock@fd484000 {
+ compatible = "qcom,apq8084-tcsr-mutex", "qcom,tcsr-mutex";
+ reg = <0xfd484000 0x1000>;
#hwlock-cells = <1>;
};
@@ -419,29 +419,29 @@
status = "disabled";
};
- sdhci@f9824900 {
+ mmc@f9824900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
- reg-names = "hc_mem", "core_mem";
+ reg-names = "hc", "core";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC1_APPS_CLK>,
- <&gcc GCC_SDCC1_AHB_CLK>,
+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>,
<&xo_board>;
- clock-names = "core", "iface", "xo";
+ clock-names = "iface", "core", "xo";
status = "disabled";
};
- sdhci@f98a4900 {
+ mmc@f98a4900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
- reg-names = "hc_mem", "core_mem";
+ reg-names = "hc", "core";
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_APPS_CLK>,
- <&gcc GCC_SDCC2_AHB_CLK>,
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
<&xo_board>;
- clock-names = "core", "iface", "xo";
+ clock-names = "iface", "core", "xo";
status = "disabled";
};
@@ -470,7 +470,7 @@
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
- rpm_requests {
+ rpm-requests {
compatible = "qcom,rpm-apq8084";
qcom,smd-channels = "rpm_requests";