diff options
Diffstat (limited to 'arch/arm/boot/dts/r8a7792.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 39af16caa2ae..a6d9367f8fa0 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -45,7 +45,6 @@ cpus { #address-cells = <1>; #size-cells = <0>; - enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -54,6 +53,7 @@ clock-frequency = <1000000000>; clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; power-domains = <&sysc R8A7792_PD_CA15_CPU0>; + enable-method = "renesas,apmu"; next-level-cache = <&L2_CA15>; }; @@ -64,6 +64,7 @@ clock-frequency = <1000000000>; clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; power-domains = <&sysc R8A7792_PD_CA15_CPU1>; + enable-method = "renesas,apmu"; next-level-cache = <&L2_CA15>; }; @@ -110,6 +111,7 @@ compatible = "renesas,r8a7792-wdt", "renesas,rcar-gen2-wdt"; reg = <0 0xe6020000 0 0x0c>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; resets = <&cpg 402>; @@ -296,7 +298,7 @@ resets = <&cpg 913>; }; - pfc: pin-controller@e6060000 { + pfc: pinctrl@e6060000 { compatible = "renesas,pfc-r8a7792"; reg = <0 0xe6060000 0 0x144>; }; @@ -314,7 +316,7 @@ apmu@e6152000 { compatible = "renesas,r8a7792-apmu", "renesas,apmu"; reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0 &cpu1>; + cpus = <&cpu0>, <&cpu1>; }; rst: reset-controller@e6160000 { @@ -537,6 +539,7 @@ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; @@ -780,7 +783,7 @@ status = "disabled"; }; - sdhi0: sd@ee100000 { + sdhi0: mmc@ee100000 { compatible = "renesas,sdhi-r8a7792", "renesas,rcar-gen2-sdhi"; reg = <0 0xee100000 0 0x328>; @@ -852,9 +855,10 @@ reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>; + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; + resets = <&cpg 724>; + reset-names = "du.0"; status = "disabled"; ports { |