diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91x40.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/debug-macro.S | 8 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/system.h | 4 |
3 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index d34cdb8abdca..063ac44a0204 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h @@ -52,4 +52,10 @@ #define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */ #define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */ +/* + * Support defines for the simple Power Controller module. + */ +#define AT91_PS_CR (AT91_PS + 0) /* PS Control register */ +#define AT91_PS_CR_CPU (1 << 0) /* CPU clock disable bit */ + #endif /* AT91X40_H */ diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index 9e750a1c1b5a..0f959faf74a9 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S @@ -14,11 +14,9 @@ #include <mach/hardware.h> #include <mach/at91_dbgu.h> - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) - ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) + .macro addruart, rp, rv + ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) + ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h index ee8db152592e..36af14bc13bb 100644 --- a/arch/arm/mach-at91/include/mach/system.h +++ b/arch/arm/mach-at91/include/mach/system.h @@ -32,7 +32,11 @@ static inline void arch_idle(void) * Disable the processor clock. The processor will be automatically * re-enabled by an interrupt or by a reset. */ +#ifdef AT91_PS + at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); +#else at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); +#endif #ifndef CONFIG_CPU_ARM920T /* * Set the processor (CP15) into 'Wait for Interrupt' mode. |