diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 34 |
1 files changed, 24 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 5bb8c26e0825..ac1c3a7e5f7a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -96,7 +96,7 @@ }; reboot { - compatible ="syscon-reboot"; + compatible = "syscon-reboot"; regmap = <&rst>; offset = <0>; mask = <0x02>; @@ -120,13 +120,13 @@ }; gic: interrupt-controller@6000000 { - compatible= "arm,gic-v3"; + compatible = "arm,gic-v3"; #address-cells = <2>; #size-cells = <2>; ranges; - reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */ + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */ - #interrupt-cells= <3>; + #interrupt-cells = <3>; interrupt-controller; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>; @@ -224,6 +224,20 @@ little-endian; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1028a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; + #address-cells = <1>; + #size-cells = <1>; + + ls1028a_uid: unique-id@1c { + reg = <0x1c 0x8>; + }; + }; + scfg: syscon@1fc0000 { compatible = "fsl,ls1028a-scfg", "syscon"; reg = <0x0 0x1fc0000 0x0 0x10000>; @@ -588,7 +602,6 @@ compatible = "fsl,ls1028a-dwc3", "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; snps,dis_rxdet_inp3_quirk; snps,quirk-frame-length-adjustment = <0x20>; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; @@ -599,7 +612,6 @@ compatible = "fsl,ls1028a-dwc3", "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; snps,dis_rxdet_inp3_quirk; snps,quirk-frame-length-adjustment = <0x20>; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; @@ -760,28 +772,28 @@ sec_jr0: jr@10000 { compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x10000 0x10000>; + reg = <0x10000 0x10000>; interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; }; sec_jr1: jr@20000 { compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x20000 0x10000>; + reg = <0x20000 0x10000>; interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; }; sec_jr2: jr@30000 { compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x30000 0x10000>; + reg = <0x30000 0x10000>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; }; sec_jr3: jr@40000 { compatible = "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x40000 0x10000>; + reg = <0x40000 0x10000>; interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -1144,6 +1156,7 @@ mscc_felix_port4: port@4 { reg = <4>; phy-mode = "internal"; + ethernet = <&enetc_port2>; status = "disabled"; fixed-link { @@ -1156,6 +1169,7 @@ mscc_felix_port5: port@5 { reg = <5>; phy-mode = "internal"; + ethernet = <&enetc_port3>; status = "disabled"; fixed-link { |