diff options
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774b1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 0f7bdfc90a0d..d541b48c7e38 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -47,7 +47,7 @@ clock-frequency = <0>; }; - cluster0_opp: opp_table0 { + cluster0_opp: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -156,6 +156,7 @@ compatible = "renesas,r8a774b1-wdt", "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 402>; @@ -1051,6 +1052,7 @@ reg = <0 0xe66c0000 0 0x8000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch_int", "g_int"; clocks = <&cpg CPG_MOD 914>, <&cpg CPG_CORE R8A774B1_CLK_CANFD>, <&can_clk>; @@ -1571,7 +1573,7 @@ * clkout : #clock-cells = <0>; <&rcar_sound>; * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; */ - compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; + compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ @@ -1883,7 +1885,7 @@ dma-names = "rx", "tx"; }; ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; + dmas = <&audma0 0x71>, <&audma1 0x72>; dma-names = "rx", "tx"; }; ssiu41: ssiu-33 { @@ -2133,7 +2135,8 @@ "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; + clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 314>; @@ -2145,7 +2148,8 @@ "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; + clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 313>; @@ -2157,7 +2161,8 @@ "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; + clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 312>; @@ -2169,7 +2174,8 @@ "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; + clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 311>; @@ -2185,7 +2191,6 @@ reg-names = "regs", "dirmap", "wbuf"; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>; - clock-names = "rpc"; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 917>; #address-cells = <1>; @@ -2578,8 +2583,6 @@ port@0 { reg = <0>; - du_out_rgb: endpoint { - }; }; port@1 { reg = <1>; @@ -2616,8 +2619,6 @@ }; port@1 { reg = <1>; - lvds0_out: endpoint { - }; }; }; }; @@ -2629,7 +2630,7 @@ }; thermal-zones { - sensor_thermal1: sensor-thermal1 { + sensor1_thermal: sensor1-thermal { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; @@ -2644,7 +2645,7 @@ }; }; - sensor_thermal2: sensor-thermal2 { + sensor2_thermal: sensor2-thermal { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; @@ -2659,7 +2660,7 @@ }; }; - sensor_thermal3: sensor-thermal3 { + sensor3_thermal: sensor3-thermal { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; |