aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf548
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/mach-bf548')
-rw-r--r--arch/blackfin/mach-bf548/head.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index e5e56df3bf46..47cd91777a3b 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -97,8 +97,8 @@ ENTRY(__stext)
R0 = R1;
/* Turn off the icache */
- p0.l = (IMEM_CONTROL & 0xFFFF);
- p0.h = (IMEM_CONTROL >> 16);
+ p0.l = LO(IMEM_CONTROL);
+ p0.h = HI(IMEM_CONTROL);
R1 = [p0];
R0 = ~ENICPLB;
R0 = R0 & R1;
@@ -106,8 +106,8 @@ ENTRY(__stext)
SSYNC;
/* Turn off the dcache */
- p0.l = (DMEM_CONTROL & 0xFFFF);
- p0.h = (DMEM_CONTROL >> 16);
+ p0.l = LO(DMEM_CONTROL);
+ p0.h = HI(DMEM_CONTROL);
R1 = [p0];
R0 = ~ENDCPLB;
R0 = R0 & R1;
@@ -335,8 +335,8 @@ ENTRY(_start_dma_code)
w[p0] = r0.l;
ssync;
- p0.l = (EBIU_SDBCTL & 0xFFFF);
- p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */
+ p0.l = LO(EBIU_SDBCTL);
+ p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
r0 = mem_SDBCTL;
w[p0] = r0.l;
ssync;