aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/alchemy
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/Kconfig2
-rw-r--r--arch/mips/alchemy/common/gpio.c203
-rw-r--r--arch/mips/alchemy/common/platform.c30
-rw-r--r--arch/mips/alchemy/devboards/pb1200/platform.c14
4 files changed, 156 insertions, 93 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 7f8ef13d0014..8128aebfb155 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -134,4 +134,4 @@ config SOC_AU1X00
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_APM_EMULATION
- select GENERIC_HARDIRQS_NO__DO_IRQ
+ select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/mips/alchemy/common/gpio.c b/arch/mips/alchemy/common/gpio.c
index e660ddd611c4..91a9c4436c39 100644
--- a/arch/mips/alchemy/common/gpio.c
+++ b/arch/mips/alchemy/common/gpio.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
* Architecture specific GPIO support
*
* This program is free software; you can redistribute it and/or modify it
@@ -27,122 +27,175 @@
* others have a second one : GPIO2
*/
+#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/gpio.h>
-#define gpio1 sys
-#if !defined(CONFIG_SOC_AU1000)
-
-static struct au1x00_gpio2 *const gpio2 = (struct au1x00_gpio2 *) GPIO2_BASE;
-#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
+struct au1000_gpio_chip {
+ struct gpio_chip chip;
+ void __iomem *regbase;
+};
-static int au1xxx_gpio2_read(unsigned gpio)
+#if !defined(CONFIG_SOC_AU1000)
+static int au1000_gpio2_get(struct gpio_chip *chip, unsigned offset)
{
- gpio -= AU1XXX_GPIO_BASE;
- return ((gpio2->pinstate >> gpio) & 0x01);
+ u32 mask = 1 << offset;
+ struct au1000_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+ return readl(gpch->regbase + AU1000_GPIO2_ST) & mask;
}
-static void au1xxx_gpio2_write(unsigned gpio, int value)
+static void au1000_gpio2_set(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- gpio -= AU1XXX_GPIO_BASE;
+ u32 mask = ((GPIO2_OUT_EN_MASK << offset) | (!!value << offset));
+ struct au1000_gpio_chip *gpch;
+ unsigned long flags;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
- gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
+ local_irq_save(flags);
+ writel(mask, gpch->regbase + AU1000_GPIO2_OUT);
+ local_irq_restore(flags);
}
-static int au1xxx_gpio2_direction_input(unsigned gpio)
+static int au1000_gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
{
- gpio -= AU1XXX_GPIO_BASE;
- gpio2->dir &= ~(0x01 << gpio);
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct au1000_gpio_chip *gpch;
+ unsigned long flags;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
+ local_irq_save(flags);
+ tmp = readl(gpch->regbase + AU1000_GPIO2_DIR);
+ tmp &= ~mask;
+ writel(tmp, gpch->regbase + AU1000_GPIO2_DIR);
+ local_irq_restore(flags);
+
return 0;
}
-static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
+static int au1000_gpio2_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- gpio -= AU1XXX_GPIO_BASE;
- gpio2->dir |= 0x01 << gpio;
- gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
+ u32 mask = 1 << offset;
+ u32 out_mask = ((GPIO2_OUT_EN_MASK << offset) | (!!value << offset));
+ u32 tmp;
+ struct au1000_gpio_chip *gpch;
+ unsigned long flags;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
+ local_irq_save(flags);
+ tmp = readl(gpch->regbase + AU1000_GPIO2_DIR);
+ tmp |= mask;
+ writel(tmp, gpch->regbase + AU1000_GPIO2_DIR);
+ writel(out_mask, gpch->regbase + AU1000_GPIO2_OUT);
+ local_irq_restore(flags);
+
return 0;
}
-
#endif /* !defined(CONFIG_SOC_AU1000) */
-static int au1xxx_gpio1_read(unsigned gpio)
+static int au1000_gpio1_get(struct gpio_chip *chip, unsigned offset)
{
- return (gpio1->pinstaterd >> gpio) & 0x01;
+ u32 mask = 1 << offset;
+ struct au1000_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+ return readl(gpch->regbase + AU1000_GPIO1_ST) & mask;
}
-static void au1xxx_gpio1_write(unsigned gpio, int value)
+static void au1000_gpio1_set(struct gpio_chip *chip,
+ unsigned offset, int value)
{
+ u32 mask = 1 << offset;
+ u32 reg_offset;
+ struct au1000_gpio_chip *gpch;
+ unsigned long flags;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
if (value)
- gpio1->outputset = (0x01 << gpio);
+ reg_offset = AU1000_GPIO1_OUT;
else
- /* Output a zero */
- gpio1->outputclr = (0x01 << gpio);
-}
+ reg_offset = AU1000_GPIO1_CLR;
-static int au1xxx_gpio1_direction_input(unsigned gpio)
-{
- gpio1->pininputen = (0x01 << gpio);
- return 0;
+ local_irq_save(flags);
+ writel(mask, gpch->regbase + reg_offset);
+ local_irq_restore(flags);
}
-static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
+static int au1000_gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
{
- gpio1->trioutclr = (0x01 & gpio);
- au1xxx_gpio1_write(gpio, value);
+ u32 mask = 1 << offset;
+ struct au1000_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
+ writel(mask, gpch->regbase + AU1000_GPIO1_ST);
+
return 0;
}
-int au1xxx_gpio_get_value(unsigned gpio)
+static int au1000_gpio1_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
- return 0;
-#else
- return au1xxx_gpio2_read(gpio);
-#endif
- else
- return au1xxx_gpio1_read(gpio);
-}
-EXPORT_SYMBOL(au1xxx_gpio_get_value);
+ u32 mask = 1 << offset;
+ struct au1000_gpio_chip *gpch;
-void au1xxx_gpio_set_value(unsigned gpio, int value)
-{
- if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
- ;
-#else
- au1xxx_gpio2_write(gpio, value);
-#endif
- else
- au1xxx_gpio1_write(gpio, value);
-}
-EXPORT_SYMBOL(au1xxx_gpio_set_value);
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
-int au1xxx_gpio_direction_input(unsigned gpio)
-{
- if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
- return -ENODEV;
-#else
- return au1xxx_gpio2_direction_input(gpio);
-#endif
+ writel(mask, gpch->regbase + AU1000_GPIO1_TRI_OUT);
+ au1000_gpio1_set(chip, offset, value);
- return au1xxx_gpio1_direction_input(gpio);
+ return 0;
}
-EXPORT_SYMBOL(au1xxx_gpio_direction_input);
-int au1xxx_gpio_direction_output(unsigned gpio, int value)
+struct au1000_gpio_chip au1000_gpio_chip[] = {
+ [0] = {
+ .regbase = (void __iomem *)SYS_BASE,
+ .chip = {
+ .label = "au1000-gpio1",
+ .direction_input = au1000_gpio1_direction_input,
+ .direction_output = au1000_gpio1_direction_output,
+ .get = au1000_gpio1_get,
+ .set = au1000_gpio1_set,
+ .base = 0,
+ .ngpio = 32,
+ },
+ },
+#if !defined(CONFIG_SOC_AU1000)
+ [1] = {
+ .regbase = (void __iomem *)GPIO2_BASE,
+ .chip = {
+ .label = "au1000-gpio2",
+ .direction_input = au1000_gpio2_direction_input,
+ .direction_output = au1000_gpio2_direction_output,
+ .get = au1000_gpio2_get,
+ .set = au1000_gpio2_set,
+ .base = AU1XXX_GPIO_BASE,
+ .ngpio = 32,
+ },
+ },
+#endif
+};
+
+static int __init au1000_gpio_init(void)
{
- if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
- return -ENODEV;
-#else
- return au1xxx_gpio2_direction_output(gpio, value);
+ gpiochip_add(&au1000_gpio_chip[0].chip);
+#if !defined(CONFIG_SOC_AU1000)
+ gpiochip_add(&au1000_gpio_chip[1].chip);
#endif
- return au1xxx_gpio1_direction_output(gpio, value);
+ return 0;
}
-EXPORT_SYMBOL(au1xxx_gpio_direction_output);
+arch_initcall(au1000_gpio_init);
+
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 5c76c6448e04..117f99f70649 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -80,14 +80,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
};
/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = DMA_32BIT_MASK;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1xxx_usb_ohci_device = {
.name = "au1xxx-ohci",
.id = 0,
.dev = {
.dma_mask = &ohci_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
.resource = au1xxx_usb_ohci_resources,
@@ -109,14 +109,14 @@ static struct resource au1100_lcd_resources[] = {
}
};
-static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
+static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1100_lcd_device = {
.name = "au1100-lcd",
.id = 0,
.dev = {
.dma_mask = &au1100_lcd_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
.resource = au1100_lcd_resources,
@@ -138,14 +138,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
},
};
-static u64 ehci_dmamask = DMA_32BIT_MASK;
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1xxx_usb_ehci_device = {
.name = "au1xxx-ehci",
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
.resource = au1xxx_usb_ehci_resources,
@@ -165,14 +165,14 @@ static struct resource au1xxx_usb_gdt_resources[] = {
},
};
-static u64 udc_dmamask = DMA_32BIT_MASK;
+static u64 udc_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1xxx_usb_gdt_device = {
.name = "au1xxx-udc",
.id = 0,
.dev = {
.dma_mask = &udc_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
.resource = au1xxx_usb_gdt_resources,
@@ -192,14 +192,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
},
};
-static u64 uoc_dmamask = DMA_32BIT_MASK;
+static u64 uoc_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1xxx_usb_otg_device = {
.name = "au1xxx-uoc",
.id = 0,
.dev = {
.dma_mask = &uoc_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
.resource = au1xxx_usb_otg_resources,
@@ -218,20 +218,20 @@ static struct resource au1200_lcd_resources[] = {
}
};
-static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
+static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
static struct platform_device au1200_lcd_device = {
.name = "au1200-lcd",
.id = 0,
.dev = {
.dma_mask = &au1200_lcd_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
.resource = au1200_lcd_resources,
};
-static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
+static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
extern struct au1xmmc_platform_data au1xmmc_platdata[2];
@@ -263,7 +263,7 @@ static struct platform_device au1200_mmc0_device = {
.id = 0,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &au1xmmc_platdata[0],
},
.num_resources = ARRAY_SIZE(au1200_mmc0_resources),
@@ -299,7 +299,7 @@ static struct platform_device au1200_mmc1_device = {
.id = 1,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &au1xmmc_platdata[1],
},
.num_resources = ARRAY_SIZE(au1200_mmc1_resources),
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
index 95303297c534..b93dff4a6789 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
+#include <linux/smc91x.h>
#include <asm/mach-au1x00/au1xxx.h>
#include <asm/mach-au1x00/au1100_mmc.h>
@@ -118,19 +119,25 @@ static struct resource ide_resources[] = {
}
};
-static u64 ide_dmamask = DMA_32BIT_MASK;
+static u64 ide_dmamask = DMA_BIT_MASK(32);
static struct platform_device ide_device = {
.name = "au1200-ide",
.id = 0,
.dev = {
.dma_mask = &ide_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(ide_resources),
.resource = ide_resources
};
+static struct smc91x_platdata smc_data = {
+ .flags = SMC91X_NOWAIT | SMC91X_USE_16BIT,
+ .leda = RPC_LED_100_10,
+ .ledb = RPC_LED_TX_RX,
+};
+
static struct resource smc91c111_resources[] = {
[0] = {
.name = "smc91x-regs",
@@ -146,6 +153,9 @@ static struct resource smc91c111_resources[] = {
};
static struct platform_device smc91c111_device = {
+ .dev = {
+ .platform_data = &smc_data,
+ },
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91c111_resources),
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.