diff options
Diffstat (limited to 'arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c')
| -rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index 551235648811..305eb12f84cc 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -204,8 +204,8 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { .mask_ack = toshiba_rbtx4927_irq_ioc_disable, .unmask = toshiba_rbtx4927_irq_ioc_enable, }; -#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 -#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 +#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL +#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL u32 bit2num(u32 num) @@ -224,7 +224,7 @@ int toshiba_rbtx4927_irq_nested(int sw_irq) { u32 level3; - level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; + level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; if (level3) { sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3); if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) { @@ -288,9 +288,9 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) panic("\n"); } - v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); + v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); - TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); + writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); } @@ -308,9 +308,10 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) panic("\n"); } - v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); + v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); - TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); + writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); + mmiowb(); } @@ -387,12 +388,12 @@ void toshiba_rbtx4927_irq_dump_pics(char *s) level1_m = level0_m; level1_s = level0_s & 0x87; - level2 = TX4927_RD(0xff1ff6a0); + level2 = __raw_readl((void __iomem *)0xff1ff6a0UL); level2_p = (((level2 & 0x10000)) ? 0 : 1); level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f)); - level3_m = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f; - level3_s = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; + level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f; + level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; level4_m = inb(0x21); outb(0x0A, 0x20); |