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-rw-r--r--arch/sh/include/asm/ubc.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
index 4ca4b7717371..dd7878197b6e 100644
--- a/arch/sh/include/asm/ubc.h
+++ b/arch/sh/include/asm/ubc.h
@@ -10,8 +10,8 @@
*/
#ifndef __ASM_SH_UBC_H
#define __ASM_SH_UBC_H
-#ifdef __KERNEL__
+#ifdef __KERNEL__
#include <cpu/ubc.h>
/* User Break Controller */
@@ -60,6 +60,12 @@
#define BRCR_UBDE (1 << 0)
#endif
+/*
+ * All SH parts have 2 UBC channels. I defy any hardware designer to
+ * invalidate this assertion.
+ */
+#define NR_UBC_CHANNELS 2
+
#ifndef __ASSEMBLY__
/* arch/sh/kernel/cpu/ubc.S */
extern void ubc_sleep(void);