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Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7724.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c153
1 files changed, 86 insertions, 67 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index e7fa2a92fc1f..79c556e56262 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -18,48 +18,104 @@
#include <linux/mm.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
+#include <linux/sh_dma.h>
#include <linux/sh_timer.h>
#include <linux/io.h>
#include <linux/notifier.h>
#include <asm/suspend.h>
#include <asm/clock.h>
-#include <asm/dmaengine.h>
#include <asm/mmzone.h>
#include <cpu/dma-register.h>
#include <cpu/sh7724.h>
/* DMA */
-static struct sh_dmae_channel sh7724_dmae0_channels[] = {
+static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = {
{
- .offset = 0,
- .dmars = 0,
- .dmars_bit = 0,
+ .slave_id = SHDMA_SLAVE_SCIF0_TX,
+ .addr = 0xffe0000c,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x21,
}, {
- .offset = 0x10,
- .dmars = 0,
- .dmars_bit = 8,
+ .slave_id = SHDMA_SLAVE_SCIF0_RX,
+ .addr = 0xffe00014,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x22,
}, {
- .offset = 0x20,
- .dmars = 4,
- .dmars_bit = 0,
+ .slave_id = SHDMA_SLAVE_SCIF1_TX,
+ .addr = 0xffe1000c,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x25,
}, {
- .offset = 0x30,
- .dmars = 4,
- .dmars_bit = 8,
+ .slave_id = SHDMA_SLAVE_SCIF1_RX,
+ .addr = 0xffe10014,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x26,
}, {
- .offset = 0x50,
- .dmars = 8,
- .dmars_bit = 0,
+ .slave_id = SHDMA_SLAVE_SCIF2_TX,
+ .addr = 0xffe2000c,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x29,
}, {
- .offset = 0x60,
- .dmars = 8,
- .dmars_bit = 8,
- }
+ .slave_id = SHDMA_SLAVE_SCIF2_RX,
+ .addr = 0xffe20014,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x2a,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF3_TX,
+ .addr = 0xa4e30020,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x2d,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF3_RX,
+ .addr = 0xa4e30024,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x2e,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF4_TX,
+ .addr = 0xa4e40020,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x31,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF4_RX,
+ .addr = 0xa4e40024,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x32,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF5_TX,
+ .addr = 0xa4e50020,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x35,
+ }, {
+ .slave_id = SHDMA_SLAVE_SCIF5_RX,
+ .addr = 0xa4e50024,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+ .mid_rid = 0x36,
+ }, {
+ .slave_id = SHDMA_SLAVE_SDHI0_TX,
+ .addr = 0x04ce0030,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+ .mid_rid = 0xc1,
+ }, {
+ .slave_id = SHDMA_SLAVE_SDHI0_RX,
+ .addr = 0x04ce0030,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+ .mid_rid = 0xc2,
+ }, {
+ .slave_id = SHDMA_SLAVE_SDHI1_TX,
+ .addr = 0x04cf0030,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+ .mid_rid = 0xc9,
+ }, {
+ .slave_id = SHDMA_SLAVE_SDHI1_RX,
+ .addr = 0x04cf0030,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+ .mid_rid = 0xca,
+ },
};
-static struct sh_dmae_channel sh7724_dmae1_channels[] = {
+static const struct sh_dmae_channel sh7724_dmae_channels[] = {
{
.offset = 0,
.dmars = 0,
@@ -87,23 +143,13 @@ static struct sh_dmae_channel sh7724_dmae1_channels[] = {
}
};
-static unsigned int ts_shift[] = TS_SHIFT;
-
-static struct sh_dmae_pdata dma0_platform_data = {
- .channel = sh7724_dmae0_channels,
- .channel_num = ARRAY_SIZE(sh7724_dmae0_channels),
- .ts_low_shift = CHCR_TS_LOW_SHIFT,
- .ts_low_mask = CHCR_TS_LOW_MASK,
- .ts_high_shift = CHCR_TS_HIGH_SHIFT,
- .ts_high_mask = CHCR_TS_HIGH_MASK,
- .ts_shift = ts_shift,
- .ts_shift_num = ARRAY_SIZE(ts_shift),
- .dmaor_init = DMAOR_INIT,
-};
+static const unsigned int ts_shift[] = TS_SHIFT;
-static struct sh_dmae_pdata dma1_platform_data = {
- .channel = sh7724_dmae1_channels,
- .channel_num = ARRAY_SIZE(sh7724_dmae1_channels),
+static struct sh_dmae_pdata dma_platform_data = {
+ .slave = sh7724_dmae_slaves,
+ .slave_num = ARRAY_SIZE(sh7724_dmae_slaves),
+ .channel = sh7724_dmae_channels,
+ .channel_num = ARRAY_SIZE(sh7724_dmae_channels),
.ts_low_shift = CHCR_TS_LOW_SHIFT,
.ts_low_mask = CHCR_TS_LOW_MASK,
.ts_high_shift = CHCR_TS_HIGH_SHIFT,
@@ -187,7 +233,7 @@ static struct platform_device dma0_device = {
.resource = sh7724_dmae0_resources,
.num_resources = ARRAY_SIZE(sh7724_dmae0_resources),
.dev = {
- .platform_data = &dma0_platform_data,
+ .platform_data = &dma_platform_data,
},
.archdata = {
.hwblk_id = HWBLK_DMAC0,
@@ -200,7 +246,7 @@ static struct platform_device dma1_device = {
.resource = sh7724_dmae1_resources,
.num_resources = ARRAY_SIZE(sh7724_dmae1_resources),
.dev = {
- .platform_data = &dma1_platform_data,
+ .platform_data = &dma_platform_data,
},
.archdata = {
.hwblk_id = HWBLK_DMAC1,
@@ -213,7 +259,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
- .clk = "scif0",
};
static struct platform_device scif0_device = {
@@ -229,7 +274,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
- .clk = "scif1",
};
static struct platform_device scif1_device = {
@@ -245,7 +289,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
- .clk = "scif2",
};
static struct platform_device scif2_device = {
@@ -261,7 +304,6 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 56, 56, 56, 56 },
- .clk = "scif3",
};
static struct platform_device scif3_device = {
@@ -277,7 +319,6 @@ static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 88, 88, 88, 88 },
- .clk = "scif4",
};
static struct platform_device scif4_device = {
@@ -293,7 +334,6 @@ static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 109, 109, 109, 109 },
- .clk = "scif5",
};
static struct platform_device scif5_device = {
@@ -485,17 +525,14 @@ static struct platform_device veu1_device = {
};
static struct sh_timer_config cmt_platform_data = {
- .name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
- .clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 200,
};
static struct resource cmt_resources[] = {
[0] = {
- .name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@@ -520,16 +557,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
- .name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
- .clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
- .name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@@ -554,16 +588,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
- .name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
- .clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
- .name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@@ -588,15 +619,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
- .name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
- .clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
- .name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
@@ -622,15 +650,12 @@ static struct platform_device tmu2_device = {
static struct sh_timer_config tmu3_platform_data = {
- .name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
- .clk = "tmu1",
};
static struct resource tmu3_resources[] = {
[0] = {
- .name = "TMU3",
.start = 0xffd90008,
.end = 0xffd90013,
.flags = IORESOURCE_MEM,
@@ -655,15 +680,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
- .name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
- .clk = "tmu1",
};
static struct resource tmu4_resources[] = {
[0] = {
- .name = "TMU4",
.start = 0xffd90014,
.end = 0xffd9001f,
.flags = IORESOURCE_MEM,
@@ -688,15 +710,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
- .name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
- .clk = "tmu1",
};
static struct resource tmu5_resources[] = {
[0] = {
- .name = "TMU5",
.start = 0xffd90020,
.end = 0xffd9002b,
.flags = IORESOURCE_MEM,
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.