diff options
Diffstat (limited to 'drivers/bcma')
| -rw-r--r-- | drivers/bcma/Kconfig | 18 | ||||
| -rw-r--r-- | drivers/bcma/driver_gpio.c | 2 | ||||
| -rw-r--r-- | drivers/bcma/driver_mips.c | 12 | ||||
| -rw-r--r-- | drivers/bcma/driver_pcie2.c | 3 |
4 files changed, 20 insertions, 15 deletions
diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index a2df1ad03463..ba8acca036df 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig @@ -11,14 +11,15 @@ menuconfig BCMA Bus driver for Broadcom specific Advanced Microcontroller Bus Architecture. +if BCMA + # Support for Block-I/O. SELECT this from the driver that needs it. config BCMA_BLOCKIO bool - depends on BCMA config BCMA_HOST_PCI_POSSIBLE bool - depends on BCMA && PCI = y + depends on PCI = y default y config BCMA_HOST_PCI @@ -29,7 +30,6 @@ config BCMA_HOST_PCI config BCMA_HOST_SOC bool "Support for BCMA in a SoC" - depends on BCMA help Host interface for a Broadcom AIX bus directly mapped into the memory. This only works with the Broadcom SoCs from the @@ -39,7 +39,7 @@ config BCMA_HOST_SOC config BCMA_DRIVER_PCI bool "BCMA Broadcom PCI core driver" - depends on BCMA && PCI + depends on PCI default y help BCMA bus may have many versions of PCIe core. This driver @@ -55,13 +55,13 @@ config BCMA_DRIVER_PCI config BCMA_DRIVER_PCI_HOSTMODE bool "Driver for PCI core working in hostmode" - depends on BCMA && MIPS && BCMA_DRIVER_PCI + depends on MIPS && BCMA_DRIVER_PCI && PCI_DRIVERS_LEGACY help PCI core hostmode operation (external PCI bus). config BCMA_DRIVER_MIPS bool "BCMA Broadcom MIPS core driver" - depends on BCMA && MIPS + depends on MIPS help Driver for the Broadcom MIPS core attached to Broadcom specific Advanced Microcontroller Bus. @@ -92,7 +92,6 @@ config BCMA_NFLASH config BCMA_DRIVER_GMAC_CMN bool "BCMA Broadcom GBIT MAC COMMON core driver" - depends on BCMA help Driver for the Broadcom GBIT MAC COMMON core attached to Broadcom specific Advanced Microcontroller Bus. @@ -101,7 +100,7 @@ config BCMA_DRIVER_GMAC_CMN config BCMA_DRIVER_GPIO bool "BCMA GPIO driver" - depends on BCMA && GPIOLIB + depends on GPIOLIB select GPIOLIB_IRQCHIP if BCMA_HOST_SOC help Driver to provide access to the GPIO pins of the bcma bus. @@ -110,8 +109,9 @@ config BCMA_DRIVER_GPIO config BCMA_DEBUG bool "BCMA debugging" - depends on BCMA help This turns on additional debugging messages. If unsure, say N + +endif # BCMA diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 982d5781d3ce..2c0ffb77d738 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c @@ -113,7 +113,7 @@ static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id) return IRQ_NONE; for_each_set_bit(gpio, &irqs, gc->ngpio) - generic_handle_irq(irq_find_mapping(gc->irqdomain, gpio)); + generic_handle_irq(irq_find_mapping(gc->irq.domain, gpio)); bcma_chipco_gpio_polarity(cc, irqs, val & irqs); return IRQ_HANDLED; diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c index 89af807cf29c..f040aba48d50 100644 --- a/drivers/bcma/driver_mips.c +++ b/drivers/bcma/driver_mips.c @@ -184,10 +184,14 @@ static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq) { int i; static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"}; - printk(KERN_DEBUG KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id); - for (i = 0; i <= 6; i++) - printk(" %s%s", irq_name[i], i == irq ? "*" : " "); - printk("\n"); + char interrupts[20]; + char *ints = interrupts; + + for (i = 0; i < ARRAY_SIZE(irq_name); i++) + ints += sprintf(ints, " %s%c", + irq_name[i], i == irq ? '*' : ' '); + + bcma_debug(dev->bus, "core 0x%04x, irq:%s\n", dev->id.id, interrupts); } static void bcma_core_mips_dump_irq(struct bcma_bus *bus) diff --git a/drivers/bcma/driver_pcie2.c b/drivers/bcma/driver_pcie2.c index b1a6e327cb23..cf889fc62ac7 100644 --- a/drivers/bcma/driver_pcie2.c +++ b/drivers/bcma/driver_pcie2.c @@ -83,7 +83,8 @@ static void bcma_core_pcie2_hw_ltr_war(struct bcma_drv_pcie2 *pcie2) bcma_core_pcie2_set_ltr_vals(pcie2); /* TODO: - si_core_wrapperreg(pcie2, 3, 0x60, 0x8080, 0); */ + *si_core_wrapperreg(pcie2, 3, 0x60, 0x8080, 0); + */ /* enable the LTR */ devstsctr2 |= PCIE2_CAP_DEVSTSCTRL2_LTRENAB; |