diff options
Diffstat (limited to 'drivers/clk/clk-xgene.c')
| -rw-r--r-- | drivers/clk/clk-xgene.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c index 3fd53057c01f..0c3d0cee98c8 100644 --- a/drivers/clk/clk-xgene.c +++ b/drivers/clk/clk-xgene.c @@ -206,17 +206,16 @@ static void xgene_pcppllclk_init(struct device_node *np) * @hw: handle between common and hardware-specific interfaces * @reg: register containing the fractional scale multiplier (scaler) * @shift: shift to the unit bit field + * @mask: mask to the unit bit field * @denom: 1/denominator unit * @lock: register lock - * Flags: - * XGENE_CLK_PMD_SCALE_INVERTED - By default the scaler is the value read + * @flags: XGENE_CLK_PMD_SCALE_INVERTED - By default the scaler is the value read * from the register plus one. For example, * 0 for (0 + 1) / denom, * 1 for (1 + 1) / denom and etc. * If this flag is set, it is * 0 for (denom - 0) / denom, * 1 for (denom - 1) / denom and etc. - * */ struct xgene_clk_pmd { struct clk_hw hw; @@ -523,10 +522,10 @@ static int xgene_clk_is_enabled(struct clk_hw *hw) pr_debug("%s clock is %s\n", clk_hw_get_name(hw), data & pclk->param.reg_clk_mask ? "enabled" : "disabled"); + } else { + return 1; } - if (!pclk->param.csr_reg) - return 1; return data & pclk->param.reg_clk_mask ? 1 : 0; } |