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Diffstat (limited to 'drivers/clk/mediatek/reset.h')
-rw-r--r--drivers/clk/mediatek/reset.h25
1 files changed, 21 insertions, 4 deletions
diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h
index 764a8affe206..851244bbd2ad 100644
--- a/drivers/clk/mediatek/reset.h
+++ b/drivers/clk/mediatek/reset.h
@@ -9,16 +9,33 @@
#include <linux/reset-controller.h>
#include <linux/types.h>
+/**
+ * enum mtk_reset_version - Version of MediaTek clock reset controller.
+ * @MTK_RST_SIMPLE: Use the same registers for bit set and clear.
+ * @MTK_RST_SET_CLR: Use separate registers for bit set and clear.
+ * @MTK_RST_MAX: Total quantity of version for MediaTek clock reset controller.
+ */
+enum mtk_reset_version {
+ MTK_RST_SIMPLE = 0,
+ MTK_RST_SET_CLR,
+ MTK_RST_MAX,
+};
+
struct mtk_reset {
struct regmap *regmap;
int regofs;
struct reset_controller_dev rcdev;
};
+/**
+ * mtk_register_reset_controller - Register MediaTek clock reset controller
+ * @np: Pointer to device node.
+ * @rst_bank_nr: Quantity of reset bank.
+ * @reg_ofs: Base offset of the reset register.
+ * @version: Version of MediaTek clock reset controller.
+ */
void mtk_register_reset_controller(struct device_node *np,
- unsigned int num_regs, int regofs);
-
-void mtk_register_reset_controller_set_clr(struct device_node *np,
- unsigned int num_regs, int regofs);
+ u32 rst_bank_nr, u16 reg_ofs,
+ enum mtk_reset_version version);
#endif /* __DRV_CLK_MTK_RESET_H */