diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index f0141f27880f..23977de4811b 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -211,12 +211,12 @@ struct dc_dcc_setting { unsigned int max_uncompressed_blk_size; bool independent_64b_blks; #if defined(CONFIG_DRM_AMD_DC_DCN) - //These bitfields to be used starting with DCN 3.0 + //These bitfields to be used starting with DCN struct { - uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN 3.0 (the worst compression case) - uint32_t dcc_128_128_uncontrained : 1; //available in ASICs before DCN 3.0 - uint32_t dcc_256_128_128 : 1; //available starting with DCN 3.0 - uint32_t dcc_256_256_unconstrained : 1; //available in ASICs before DCN 3.0 (the best compression case) + uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN (the worst compression case) + uint32_t dcc_128_128_uncontrained : 1; //available in ASICs before DCN + uint32_t dcc_256_128_128 : 1; //available starting with DCN + uint32_t dcc_256_256_unconstrained : 1; //available in ASICs before DCN (the best compression case) } dcc_controls; #endif }; @@ -731,6 +731,9 @@ struct dc { #if defined(CONFIG_DRM_AMD_DC_DCN) bool idle_optimizations_allowed; #endif +#if defined(CONFIG_DRM_AMD_DC_DCN) + bool enable_c20_dtm_b0; +#endif /* Require to maintain clocks and bandwidth for UEFI enabled HW */ |