diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c index f4b34c110eae..fbccb7263ad2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c @@ -23,9 +23,6 @@ * */ -#include <linux/delay.h> -#include <linux/slab.h> - #include "reg_helper.h" #include "core_types.h" @@ -1101,7 +1098,8 @@ void dcn10_link_encoder_disable_output( void dcn10_link_encoder_dp_set_lane_settings( struct link_encoder *enc, - const struct link_training_settings *link_settings) + const struct dc_link_settings *link_settings, + const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) { struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); union dpcd_training_lane_set training_lane_set = { { 0 } }; @@ -1116,26 +1114,25 @@ void dcn10_link_encoder_dp_set_lane_settings( cntl.action = TRANSMITTER_CONTROL_SET_VOLTAGE_AND_PREEMPASIS; cntl.transmitter = enc10->base.transmitter; cntl.connector_obj_id = enc10->base.connector; - cntl.lanes_number = link_settings->link_settings.lane_count; + cntl.lanes_number = link_settings->lane_count; cntl.hpd_sel = enc10->base.hpd_source; - cntl.pixel_clock = link_settings->link_settings.link_rate * - LINK_RATE_REF_FREQ_IN_KHZ; + cntl.pixel_clock = link_settings->link_rate * LINK_RATE_REF_FREQ_IN_KHZ; - for (lane = 0; lane < link_settings->link_settings.lane_count; lane++) { + for (lane = 0; lane < link_settings->lane_count; lane++) { /* translate lane settings */ training_lane_set.bits.VOLTAGE_SWING_SET = - link_settings->lane_settings[lane].VOLTAGE_SWING; + lane_settings[lane].VOLTAGE_SWING; training_lane_set.bits.PRE_EMPHASIS_SET = - link_settings->lane_settings[lane].PRE_EMPHASIS; + lane_settings[lane].PRE_EMPHASIS; /* post cursor 2 setting only applies to HBR2 link rate */ - if (link_settings->link_settings.link_rate == LINK_RATE_HIGH2) { + if (link_settings->link_rate == LINK_RATE_HIGH2) { /* this is passed to VBIOS * to program post cursor 2 level */ training_lane_set.bits.POST_CURSOR2_SET = - link_settings->lane_settings[lane].POST_CURSOR2; + lane_settings[lane].POST_CURSOR2; } cntl.lane_select = lane; |