diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/include/link_service_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/include/link_service_types.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/include/link_service_types.h b/drivers/gpu/drm/amd/display/include/link_service_types.h index 424bccd36434..447a56286dd0 100644 --- a/drivers/gpu/drm/amd/display/include/link_service_types.h +++ b/drivers/gpu/drm/amd/display/include/link_service_types.h @@ -74,12 +74,10 @@ enum link_training_result { LINK_TRAINING_LINK_LOSS, /* Abort link training (because sink unplugged) */ LINK_TRAINING_ABORT, -#if defined(CONFIG_DRM_AMD_DC_DCN) DP_128b_132b_LT_FAILED, DP_128b_132b_MAX_LOOP_COUNT_REACHED, DP_128b_132b_CHANNEL_EQ_DONE_TIMEOUT, DP_128b_132b_CDS_DONE_TIMEOUT, -#endif }; enum lttpr_mode { @@ -99,23 +97,19 @@ struct link_training_settings { enum dc_pre_emphasis *pre_emphasis; enum dc_post_cursor2 *post_cursor2; bool should_set_fec_ready; -#if defined(CONFIG_DRM_AMD_DC_DCN) /* TODO - factor lane_settings out because it changes during LT */ union dc_dp_ffe_preset *ffe_preset; -#endif uint16_t cr_pattern_time; uint16_t eq_pattern_time; uint16_t cds_pattern_time; enum dc_dp_training_pattern pattern_for_cr; enum dc_dp_training_pattern pattern_for_eq; -#if defined(CONFIG_DRM_AMD_DC_DCN) enum dc_dp_training_pattern pattern_for_cds; uint32_t eq_wait_time_limit; uint8_t eq_loop_count_limit; uint32_t cds_wait_time_limit; -#endif bool enhanced_framing; enum lttpr_mode lttpr_mode; @@ -161,7 +155,6 @@ enum dp_test_pattern { DP_TEST_PATTERN_CP2520_2, DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE = DP_TEST_PATTERN_CP2520_2, DP_TEST_PATTERN_CP2520_3, -#if defined(CONFIG_DRM_AMD_DC_DCN) DP_TEST_PATTERN_128b_132b_TPS1, DP_TEST_PATTERN_128b_132b_TPS2, DP_TEST_PATTERN_PRBS9, @@ -171,20 +164,15 @@ enum dp_test_pattern { DP_TEST_PATTERN_PRBS31, DP_TEST_PATTERN_264BIT_CUSTOM, DP_TEST_PATTERN_SQUARE_PULSE, -#endif /* Link Training Patterns */ DP_TEST_PATTERN_TRAINING_PATTERN1, DP_TEST_PATTERN_TRAINING_PATTERN2, DP_TEST_PATTERN_TRAINING_PATTERN3, DP_TEST_PATTERN_TRAINING_PATTERN4, -#if defined(CONFIG_DRM_AMD_DC_DCN) DP_TEST_PATTERN_128b_132b_TPS1_TRAINING_MODE, DP_TEST_PATTERN_128b_132b_TPS2_TRAINING_MODE, DP_TEST_PATTERN_PHY_PATTERN_END = DP_TEST_PATTERN_128b_132b_TPS2_TRAINING_MODE, -#else - DP_TEST_PATTERN_PHY_PATTERN_END = DP_TEST_PATTERN_TRAINING_PATTERN4, -#endif /* link test patterns*/ DP_TEST_PATTERN_COLOR_SQUARES, |