diff options
Diffstat (limited to 'drivers/gpu/drm/arm')
| -rw-r--r-- | drivers/gpu/drm/arm/Kconfig | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_drv.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 31 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_kms.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/hdlcd_crtc.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/hdlcd_drv.c | 77 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/malidp_drv.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/malidp_mw.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/malidp_planes.c | 35 | ||||
| -rw-r--r-- | drivers/gpu/drm/arm/malidp_regs.h | 2 |
16 files changed, 101 insertions, 105 deletions
diff --git a/drivers/gpu/drm/arm/Kconfig b/drivers/gpu/drm/arm/Kconfig index 6e3f1d600541..c1b89274d2a4 100644 --- a/drivers/gpu/drm/arm/Kconfig +++ b/drivers/gpu/drm/arm/Kconfig @@ -6,7 +6,7 @@ config DRM_HDLCD depends on DRM && OF && (ARM || ARM64 || COMPILE_TEST) depends on COMMON_CLK select DRM_KMS_HELPER - select DRM_GEM_CMA_HELPER + select DRM_GEM_DMA_HELPER help Choose this option if you have an ARM High Definition Colour LCD controller. @@ -27,7 +27,7 @@ config DRM_MALI_DISPLAY depends on DRM && OF && (ARM || ARM64 || COMPILE_TEST) depends on COMMON_CLK select DRM_KMS_HELPER - select DRM_GEM_CMA_HELPER + select DRM_GEM_DMA_HELPER select VIDEOMODE_HELPERS help Choose this option if you want to compile the ARM Mali Display diff --git a/drivers/gpu/drm/arm/display/Kconfig b/drivers/gpu/drm/arm/display/Kconfig index e91598b60781..4acc4285a4eb 100644 --- a/drivers/gpu/drm/arm/display/Kconfig +++ b/drivers/gpu/drm/arm/display/Kconfig @@ -4,7 +4,7 @@ config DRM_KOMEDA depends on DRM && OF depends on COMMON_CLK select DRM_KMS_HELPER - select DRM_GEM_CMA_HELPER + select DRM_GEM_DMA_HELPER select VIDEOMODE_HELPERS help Choose this option if you want to compile the ARM Komeda display diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c index daa1faccd3e7..6c56f5662bc7 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -310,8 +310,7 @@ static int d71_reset(struct d71_dev *d71) u32 __iomem *gcu = d71->gcu_addr; int ret; - malidp_write32_mask(gcu, BLK_CONTROL, - GCU_CONTROL_SRST, GCU_CONTROL_SRST); + malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST); ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST), 100, 1000, 10000); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index 59172acb9738..4cc07d6bb9d8 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -11,7 +11,6 @@ #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc_helper.h> -#include <drm/drm_plane_helper.h> #include <drm/drm_print.h> #include <drm/drm_vblank.h> @@ -235,7 +234,7 @@ void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, crtc->state->event = NULL; drm_crtc_send_vblank_event(crtc, event); } else { - DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n", + DRM_WARN("CRTC[%d]: FLIP happened but no pending commit.\n", drm_crtc_index(&kcrtc->base)); } spin_unlock_irqrestore(&crtc->dev->event_lock, flags); @@ -286,7 +285,7 @@ komeda_crtc_atomic_enable(struct drm_crtc *crtc, komeda_crtc_do_flush(crtc, old); } -static void +void komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, struct completion *input_flip_done) { diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c index ba16895690f1..9fce4239d4ad 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c @@ -9,6 +9,7 @@ #include <linux/platform_device.h> #include <linux/component.h> #include <linux/pm_runtime.h> +#include <drm/drm_fb_helper.h> #include <drm/drm_module.h> #include <drm/drm_of.h> #include "komeda_dev.h" @@ -72,6 +73,7 @@ static int komeda_bind(struct device *dev) } dev_set_drvdata(dev, mdrv); + drm_fbdev_generic_setup(&mdrv->kms->base, 32); return 0; diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c index 3c372d2deb0a..df5da5a44755 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c @@ -5,9 +5,9 @@ * */ #include <drm/drm_device.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_gem.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include "komeda_framebuffer.h" @@ -137,7 +137,7 @@ komeda_fb_none_afbc_size_check(struct komeda_dev *mdev, struct komeda_fb *kfb, } min_size = komeda_fb_get_pixel_addr(kfb, 0, fb->height, i) - - to_drm_gem_cma_obj(obj)->paddr; + - to_drm_gem_dma_obj(obj)->dma_addr; if (obj->size < min_size) { DRM_DEBUG_KMS("The fb->obj[%d] size: 0x%zx lower than the minimum requirement: 0x%llx.\n", i, obj->size, min_size); @@ -239,7 +239,7 @@ dma_addr_t komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) { struct drm_framebuffer *fb = &kfb->base; - const struct drm_gem_cma_object *obj; + const struct drm_gem_dma_object *obj; u32 offset, plane_x, plane_y, block_w, block_sz; if (plane >= fb->format->num_planes) { @@ -247,7 +247,7 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) return -EINVAL; } - obj = drm_fb_cma_get_gem_obj(fb, plane); + obj = drm_fb_dma_get_gem_obj(fb, plane); offset = fb->offsets[plane]; if (!fb->modifier) { @@ -260,7 +260,7 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) + plane_y * fb->pitches[plane]; } - return obj->paddr + offset; + return obj->dma_addr + offset; } /* if the fb can be supported by a specific layer */ diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c index 93b7f09b96ca..451746ebbe71 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c @@ -11,7 +11,7 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_probe_helper.h> @@ -21,9 +21,9 @@ #include "komeda_framebuffer.h" #include "komeda_kms.h" -DEFINE_DRM_GEM_CMA_FOPS(komeda_cma_fops); +DEFINE_DRM_GEM_DMA_FOPS(komeda_cma_fops); -static int komeda_gem_cma_dumb_create(struct drm_file *file, +static int komeda_gem_dma_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args) { @@ -32,7 +32,7 @@ static int komeda_gem_cma_dumb_create(struct drm_file *file, args->pitch = ALIGN(pitch, mdev->chip.bus_width); - return drm_gem_cma_dumb_create_internal(file, dev, args); + return drm_gem_dma_dumb_create_internal(file, dev, args); } static irqreturn_t komeda_kms_irq_handler(int irq, void *data) @@ -60,7 +60,7 @@ static irqreturn_t komeda_kms_irq_handler(int irq, void *data) static const struct drm_driver komeda_kms_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, .lastclose = drm_fb_helper_lastclose, - DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(komeda_gem_cma_dumb_create), + DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(komeda_gem_dma_dumb_create), .fops = &komeda_cma_fops, .name = "komeda", .desc = "Arm Komeda Display Processor driver", @@ -69,6 +69,25 @@ static const struct drm_driver komeda_kms_driver = { .minor = 1, }; +static void komeda_kms_atomic_commit_hw_done(struct drm_atomic_state *state) +{ + struct drm_device *dev = state->dev; + struct komeda_kms_dev *kms = to_kdev(dev); + int i; + + for (i = 0; i < kms->n_crtcs; i++) { + struct komeda_crtc *kcrtc = &kms->crtcs[i]; + + if (kcrtc->base.state->active) { + struct completion *flip_done = NULL; + if (kcrtc->base.state->event) + flip_done = kcrtc->base.state->event->base.completion; + komeda_crtc_flush_and_wait_for_flip_done(kcrtc, flip_done); + } + } + drm_atomic_helper_commit_hw_done(state); +} + static void komeda_kms_commit_tail(struct drm_atomic_state *old_state) { struct drm_device *dev = old_state->dev; @@ -81,7 +100,7 @@ static void komeda_kms_commit_tail(struct drm_atomic_state *old_state) drm_atomic_helper_commit_modeset_enables(dev, old_state); - drm_atomic_helper_commit_hw_done(old_state); + komeda_kms_atomic_commit_hw_done(old_state); drm_atomic_helper_wait_for_flip_done(dev, old_state); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h index 7889e380ab23..7339339ef6b8 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h @@ -183,6 +183,8 @@ void komeda_kms_cleanup_private_objs(struct komeda_kms_dev *kms); void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, struct komeda_events *evts); +void komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, + struct completion *input_flip_done); struct komeda_kms_dev *komeda_kms_attach(struct komeda_dev *mdev); void komeda_kms_detach(struct komeda_kms_dev *kms); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index e672b9cffee3..3276a3e82c62 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -1271,7 +1271,7 @@ int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe, return 0; } -/* Since standalong disabled components must be disabled separately and in the +/* Since standalone disabled components must be disabled separately and in the * last, So a complete disable operation may needs to call pipeline_disable * twice (two phase disabling). * Phase 1: disable the common components, flush it. diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c index dff22dec54b5..c20ff72f0ae5 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c @@ -7,7 +7,6 @@ #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> -#include <drm/drm_plane_helper.h> #include <drm/drm_print.h> #include "komeda_dev.h" #include "komeda_kms.h" diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c index afc9cd856501..7030339fa232 100644 --- a/drivers/gpu/drm/arm/hdlcd_crtc.c +++ b/drivers/gpu/drm/arm/hdlcd_crtc.c @@ -18,12 +18,11 @@ #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_of.h> -#include <drm/drm_plane_helper.h> #include <drm/drm_probe_helper.h> #include <drm/drm_vblank.h> @@ -252,8 +251,8 @@ static int hdlcd_plane_atomic_check(struct drm_plane *plane, return -EINVAL; return drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, - DRM_PLANE_HELPER_NO_SCALING, - DRM_PLANE_HELPER_NO_SCALING, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, false, true); } @@ -274,7 +273,7 @@ static void hdlcd_plane_atomic_update(struct drm_plane *plane, return; dest_h = drm_rect_height(&new_plane_state->dst); - scanout_start = drm_fb_cma_get_gem_addr(fb, new_plane_state, 0); + scanout_start = drm_fb_dma_get_gem_addr(fb, new_plane_state, 0); hdlcd = plane->dev->dev_private; hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]); diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c index e89ae0ec60eb..a032003c340c 100644 --- a/drivers/gpu/drm/arm/hdlcd_drv.c +++ b/drivers/gpu/drm/arm/hdlcd_drv.c @@ -21,13 +21,13 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <drm/drm_aperture.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_debugfs.h> #include <drm/drm_drv.h> -#include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_modeset_helper.h> #include <drm/drm_module.h> @@ -40,8 +40,7 @@ static irqreturn_t hdlcd_irq(int irq, void *arg) { - struct drm_device *drm = arg; - struct hdlcd_drm_private *hdlcd = drm->dev_private; + struct hdlcd_drm_private *hdlcd = arg; unsigned long irq_status; irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS); @@ -69,61 +68,32 @@ static irqreturn_t hdlcd_irq(int irq, void *arg) return IRQ_HANDLED; } -static void hdlcd_irq_preinstall(struct drm_device *drm) +static int hdlcd_irq_install(struct hdlcd_drm_private *hdlcd) { - struct hdlcd_drm_private *hdlcd = drm->dev_private; + int ret; + /* Ensure interrupts are disabled */ hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0); hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0); -} - -static void hdlcd_irq_postinstall(struct drm_device *drm) -{ -#ifdef CONFIG_DEBUG_FS - struct hdlcd_drm_private *hdlcd = drm->dev_private; - unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); - - /* enable debug interrupts */ - irq_mask |= HDLCD_DEBUG_INT_MASK; - - hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); -#endif -} - -static int hdlcd_irq_install(struct drm_device *drm, int irq) -{ - int ret; - - if (irq == IRQ_NOTCONNECTED) - return -ENOTCONN; - - hdlcd_irq_preinstall(drm); - ret = request_irq(irq, hdlcd_irq, 0, drm->driver->name, drm); + ret = request_irq(hdlcd->irq, hdlcd_irq, 0, "hdlcd", hdlcd); if (ret) return ret; - hdlcd_irq_postinstall(drm); +#ifdef CONFIG_DEBUG_FS + /* enable debug interrupts */ + hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, HDLCD_DEBUG_INT_MASK); +#endif return 0; } -static void hdlcd_irq_uninstall(struct drm_device *drm) +static void hdlcd_irq_uninstall(struct hdlcd_drm_private *hdlcd) { - struct hdlcd_drm_private *hdlcd = drm->dev_private; /* disable all the interrupts that we might have enabled */ - unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); - -#ifdef CONFIG_DEBUG_FS - /* disable debug interrupts */ - irq_mask &= ~HDLCD_DEBUG_INT_MASK; -#endif - - /* disable vsync interrupts */ - irq_mask &= ~HDLCD_INTERRUPT_VSYNC; - hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); + hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0); - free_irq(hdlcd->irq, drm); + free_irq(hdlcd->irq, hdlcd); } static int hdlcd_load(struct drm_device *drm, unsigned long flags) @@ -183,7 +153,7 @@ static int hdlcd_load(struct drm_device *drm, unsigned long flags) goto irq_fail; hdlcd->irq = ret; - ret = hdlcd_irq_install(drm, hdlcd->irq); + ret = hdlcd_irq_install(hdlcd); if (ret < 0) { DRM_ERROR("failed to install IRQ handler\n"); goto irq_fail; @@ -255,11 +225,11 @@ static void hdlcd_debugfs_init(struct drm_minor *minor) } #endif -DEFINE_DRM_GEM_CMA_FOPS(fops); +DEFINE_DRM_GEM_DMA_FOPS(fops); static const struct drm_driver hdlcd_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, - DRM_GEM_CMA_DRIVER_OPS, + DRM_GEM_DMA_DRIVER_OPS, #ifdef CONFIG_DEBUG_FS .debugfs_init = hdlcd_debugfs_init, #endif @@ -314,6 +284,15 @@ static int hdlcd_drm_bind(struct device *dev) goto err_vblank; } + /* + * If EFI left us running, take over from simple framebuffer + * drivers. Read HDLCD_REG_COMMAND to see if we are enabled. + */ + if (hdlcd_read(hdlcd, HDLCD_REG_COMMAND)) { + hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0); + drm_aperture_remove_framebuffers(false, &hdlcd_driver); + } + drm_mode_config_reset(drm); drm_kms_helper_poll_init(drm); @@ -335,7 +314,7 @@ err_pm_active: err_unload: of_node_put(hdlcd->crtc.port); hdlcd->crtc.port = NULL; - hdlcd_irq_uninstall(drm); + hdlcd_irq_uninstall(hdlcd); of_reserved_mem_device_release(drm->dev); err_free: drm_mode_config_cleanup(drm); @@ -357,7 +336,7 @@ static void hdlcd_drm_unbind(struct device *dev) hdlcd->crtc.port = NULL; pm_runtime_get_sync(dev); drm_atomic_helper_shutdown(drm); - hdlcd_irq_uninstall(drm); + hdlcd_irq_uninstall(hdlcd); pm_runtime_put(dev); if (pm_runtime_enabled(dev)) pm_runtime_disable(dev); diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index d5aef21426cf..1d0b0c54ccc7 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -19,10 +19,9 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_drv.h> -#include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_fourcc.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_modeset_helper.h> #include <drm/drm_module.h> @@ -457,7 +456,7 @@ static int malidp_irq_init(struct platform_device *pdev) return 0; } -DEFINE_DRM_GEM_CMA_FOPS(fops); +DEFINE_DRM_GEM_DMA_FOPS(fops); static int malidp_dumb_create(struct drm_file *file_priv, struct drm_device *drm, @@ -469,7 +468,7 @@ static int malidp_dumb_create(struct drm_file *file_priv, args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), alignment); - return drm_gem_cma_dumb_create_internal(file_priv, drm, args); + return drm_gem_dma_dumb_create_internal(file_priv, drm, args); } #ifdef CONFIG_DEBUG_FS @@ -566,7 +565,7 @@ static void malidp_debugfs_init(struct drm_minor *minor) static const struct drm_driver malidp_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, - DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(malidp_dumb_create), + DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(malidp_dumb_create), #ifdef CONFIG_DEBUG_FS .debugfs_init = malidp_debugfs_init, #endif diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c index b66ca5b33a7f..ef76d0e6ee2f 100644 --- a/drivers/gpu/drm/arm/malidp_mw.c +++ b/drivers/gpu/drm/arm/malidp_mw.c @@ -10,10 +10,10 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_edid.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_probe_helper.h> #include <drm/drm_writeback.h> @@ -160,7 +160,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, n_planes = fb->format->num_planes; for (i = 0; i < n_planes; i++) { - struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, i); + struct drm_gem_dma_object *obj = drm_fb_dma_get_gem_obj(fb, i); /* memory write buffers are never rotated */ u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0); @@ -170,7 +170,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, return -EINVAL; } mw_state->pitches[i] = fb->pitches[i]; - mw_state->addrs[i] = obj->paddr + fb->offsets[i]; + mw_state->addrs[i] = obj->dma_addr + fb->offsets[i]; } mw_state->n_planes = n_planes; diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 8a9562642d16..45f5e35e7f24 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -13,12 +13,11 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> #include <drm/drm_drv.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> -#include <drm/drm_plane_helper.h> #include <drm/drm_print.h> #include "malidp_hw.h" @@ -334,15 +333,15 @@ static bool malidp_check_pages_threshold(struct malidp_plane_state *ms, for (i = 0; i < ms->n_planes; i++) { struct drm_gem_object *obj; - struct drm_gem_cma_object *cma_obj; + struct drm_gem_dma_object *dma_obj; struct sg_table *sgt; struct scatterlist *sgl; obj = drm_gem_fb_get_obj(ms->base.fb, i); - cma_obj = to_drm_gem_cma_obj(obj); + dma_obj = to_drm_gem_dma_obj(obj); - if (cma_obj->sgt) - sgt = cma_obj->sgt; + if (dma_obj->sgt) + sgt = dma_obj->sgt; else sgt = obj->funcs->get_sg_table(obj); @@ -353,14 +352,14 @@ static bool malidp_check_pages_threshold(struct malidp_plane_state *ms, while (sgl) { if (sgl->length < pgsize) { - if (!cma_obj->sgt) + if (!dma_obj->sgt) kfree(sgt); return false; } sgl = sg_next(sgl); } - if (!cma_obj->sgt) + if (!dma_obj->sgt) kfree(sgt); } @@ -715,7 +714,7 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, struct malidp_plane *mp, int plane_index) { - dma_addr_t paddr; + dma_addr_t dma_addr; u16 ptr; struct drm_plane *plane = &mp->base; bool afbc = fb->modifier ? true : false; @@ -723,27 +722,27 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, ptr = mp->layer->ptr + (plane_index << 4); /* - * drm_fb_cma_get_gem_addr() alters the physical base address of the + * drm_fb_dma_get_gem_addr() alters the physical base address of the * framebuffer as per the plane's src_x, src_y co-ordinates (ie to * take care of source cropping). * For AFBC, this is not needed as the cropping is handled by _AD_CROP_H * and _AD_CROP_V registers. */ if (!afbc) { - paddr = drm_fb_cma_get_gem_addr(fb, plane->state, - plane_index); + dma_addr = drm_fb_dma_get_gem_addr(fb, plane->state, + plane_index); } else { - struct drm_gem_cma_object *obj; + struct drm_gem_dma_object *obj; - obj = drm_fb_cma_get_gem_obj(fb, plane_index); + obj = drm_fb_dma_get_gem_obj(fb, plane_index); if (WARN_ON(!obj)) return; - paddr = obj->paddr; + dma_addr = obj->dma_addr; } - malidp_hw_write(mp->hwdev, lower_32_bits(paddr), ptr); - malidp_hw_write(mp->hwdev, upper_32_bits(paddr), ptr + 4); + malidp_hw_write(mp->hwdev, lower_32_bits(dma_addr), ptr); + malidp_hw_write(mp->hwdev, upper_32_bits(dma_addr), ptr + 4); } static void malidp_de_set_plane_afbc(struct drm_plane *plane) diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h index 514c50dcb74d..3bc16db70ddb 100644 --- a/drivers/gpu/drm/arm/malidp_regs.h +++ b/drivers/gpu/drm/arm/malidp_regs.h @@ -145,7 +145,7 @@ #define MALIDP_SE_COEFFTAB_DATA_MASK 0x3fff #define MALIDP_SE_SET_COEFFTAB_DATA(x) \ ((x) & MALIDP_SE_COEFFTAB_DATA_MASK) -/* Enhance coeffents reigster offset */ +/* Enhance coefficients register offset */ #define MALIDP_SE_IMAGE_ENH 0x3C /* ENH_LIMITS offset 0x0 */ #define MALIDP_SE_ENH_LOW_LEVEL 24 |