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path: root/drivers/gpu/drm/drm_crtc.c
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-rw-r--r--drivers/gpu/drm/drm_crtc.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 4936e1080e41..283bcc4362ca 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -205,6 +205,33 @@ struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc)
}
/**
+ * DOC: standard CRTC properties
+ *
+ * DRM CRTCs have a few standardized properties:
+ *
+ * ACTIVE:
+ * Atomic property for setting the power state of the CRTC. When set to 1
+ * the CRTC will actively display content. When set to 0 the CRTC will be
+ * powered off. There is no expectation that user-space will reset CRTC
+ * resources like the mode and planes when setting ACTIVE to 0.
+ *
+ * User-space can rely on an ACTIVE change to 1 to never fail an atomic
+ * test as long as no other property has changed. If a change to ACTIVE
+ * fails an atomic test, this is a driver bug. For this reason setting
+ * ACTIVE to 0 must not release internal resources (like reserved memory
+ * bandwidth or clock generators).
+ *
+ * Note that the legacy DPMS property on connectors is internally routed
+ * to control this property for atomic drivers.
+ * MODE_ID:
+ * Atomic property for setting the CRTC display timings. The value is the
+ * ID of a blob containing the DRM mode info. To disable the CRTC,
+ * user-space must set this property to 0.
+ *
+ * Setting MODE_ID to 0 will release reserved resources for the CRTC.
+ */
+
+/**
* drm_crtc_init_with_planes - Initialise a new CRTC object with
* specified primary and cursor planes.
* @dev: DRM device
@@ -629,6 +656,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
fb->modifier);
if (ret) {
struct drm_format_name_buf format_name;
+
DRM_DEBUG_KMS("Invalid pixel format %s, modifier 0x%llx\n",
drm_get_format_name(fb->format->format,
&format_name),