diff options
Diffstat (limited to 'drivers/hwspinlock')
| -rw-r--r-- | drivers/hwspinlock/Kconfig | 40 | ||||
| -rw-r--r-- | drivers/hwspinlock/Makefile | 2 | ||||
| -rw-r--r-- | drivers/hwspinlock/hwspinlock_internal.h | 2 | ||||
| -rw-r--r-- | drivers/hwspinlock/omap_hwspinlock.c | 10 | ||||
| -rw-r--r-- | drivers/hwspinlock/qcom_hwspinlock.c | 114 | ||||
| -rw-r--r-- | drivers/hwspinlock/sirf_hwspinlock.c | 105 | ||||
| -rw-r--r-- | drivers/hwspinlock/sprd_hwspinlock.c | 20 | ||||
| -rw-r--r-- | drivers/hwspinlock/stm32_hwspinlock.c | 60 | ||||
| -rw-r--r-- | drivers/hwspinlock/sun6i_hwspinlock.c | 210 |
9 files changed, 371 insertions, 192 deletions
diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig index 37740e992cfa..3874d15b0e9b 100644 --- a/drivers/hwspinlock/Kconfig +++ b/drivers/hwspinlock/Kconfig @@ -6,10 +6,11 @@ menuconfig HWSPINLOCK bool "Hardware Spinlock drivers" +if HWSPINLOCK + config HWSPINLOCK_OMAP tristate "OMAP Hardware Spinlock device" - depends on HWSPINLOCK - depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 + depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST help Say y here to support the OMAP Hardware Spinlock device (firstly introduced in OMAP4). @@ -18,8 +19,7 @@ config HWSPINLOCK_OMAP config HWSPINLOCK_QCOM tristate "Qualcomm Hardware Spinlock device" - depends on HWSPINLOCK - depends on ARCH_QCOM + depends on ARCH_QCOM || COMPILE_TEST select MFD_SYSCON help Say y here to support the Qualcomm Hardware Mutex functionality, which @@ -28,22 +28,9 @@ config HWSPINLOCK_QCOM If unsure, say N. -config HWSPINLOCK_SIRF - tristate "SIRF Hardware Spinlock device" - depends on HWSPINLOCK - depends on ARCH_SIRF - help - Say y here to support the SIRF Hardware Spinlock device, which - provides a synchronisation mechanism for the various processors - on the SoC. - - It's safe to say n here if you're not interested in SIRF hardware - spinlock or just want a bare minimum kernel. - config HWSPINLOCK_SPRD tristate "SPRD Hardware Spinlock device" - depends on ARCH_SPRD - depends on HWSPINLOCK + depends on ARCH_SPRD || COMPILE_TEST help Say y here to support the SPRD Hardware Spinlock device. @@ -51,20 +38,29 @@ config HWSPINLOCK_SPRD config HWSPINLOCK_STM32 tristate "STM32 Hardware Spinlock device" - depends on MACH_STM32MP157 - depends on HWSPINLOCK + depends on MACH_STM32MP157 || COMPILE_TEST help Say y here to support the STM32 Hardware Spinlock device. If unsure, say N. +config HWSPINLOCK_SUN6I + tristate "SUN6I Hardware Spinlock device" + depends on ARCH_SUNXI || COMPILE_TEST + help + Say y here to support the SUN6I Hardware Spinlock device which can be + found in most of the sun6i compatible Allwinner SoCs. + + If unsure, say N. + config HSEM_U8500 tristate "STE Hardware Semaphore functionality" - depends on HWSPINLOCK - depends on ARCH_U8500 + depends on ARCH_U8500 || COMPILE_TEST help Say y here to support the STE Hardware Semaphore functionality, which provides a synchronisation mechanism for the various processor on the SoC. If unsure, say N. + +endif # HWSPINLOCK diff --git a/drivers/hwspinlock/Makefile b/drivers/hwspinlock/Makefile index ed053e3f02be..a0f16c9aaa82 100644 --- a/drivers/hwspinlock/Makefile +++ b/drivers/hwspinlock/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o -obj-$(CONFIG_HWSPINLOCK_SIRF) += sirf_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_SPRD) += sprd_hwspinlock.o obj-$(CONFIG_HWSPINLOCK_STM32) += stm32_hwspinlock.o +obj-$(CONFIG_HWSPINLOCK_SUN6I) += sun6i_hwspinlock.o obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o diff --git a/drivers/hwspinlock/hwspinlock_internal.h b/drivers/hwspinlock/hwspinlock_internal.h index 9eb6bd020dc7..29892767bb7a 100644 --- a/drivers/hwspinlock/hwspinlock_internal.h +++ b/drivers/hwspinlock/hwspinlock_internal.h @@ -56,7 +56,7 @@ struct hwspinlock_device { const struct hwspinlock_ops *ops; int base_id; int num_locks; - struct hwspinlock lock[0]; + struct hwspinlock lock[]; }; static inline int hwlock_to_id(struct hwspinlock *hwlock) diff --git a/drivers/hwspinlock/omap_hwspinlock.c b/drivers/hwspinlock/omap_hwspinlock.c index 3b05560456ea..1fb3a2550e29 100644 --- a/drivers/hwspinlock/omap_hwspinlock.c +++ b/drivers/hwspinlock/omap_hwspinlock.c @@ -2,11 +2,12 @@ /* * OMAP hardware spinlock driver * - * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com * * Contact: Simon Que <sque@ti.com> * Hari Kanigeri <h-kanigeri2@ti.com> * Ohad Ben-Cohen <ohad@wizery.com> + * Suman Anna <s-anna@ti.com> */ #include <linux/kernel.h> @@ -93,11 +94,9 @@ static int omap_hwspinlock_probe(struct platform_device *pdev) * the module SYSSTATUS register */ pm_runtime_enable(&pdev->dev); - ret = pm_runtime_get_sync(&pdev->dev); - if (ret < 0) { - pm_runtime_put_noidle(&pdev->dev); + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret < 0) goto runtime_err; - } /* Determine number of locks */ i = readl(io_base + SYSSTATUS_OFFSET); @@ -164,6 +163,7 @@ static int omap_hwspinlock_remove(struct platform_device *pdev) static const struct of_device_id omap_hwspinlock_of_match[] = { { .compatible = "ti,omap4-hwspinlock", }, + { .compatible = "ti,am64-hwspinlock", }, { .compatible = "ti,am654-hwspinlock", }, { /* end */ }, }; diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index f0da544b14d2..9cf186362ae2 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -19,6 +19,12 @@ #define QCOM_MUTEX_APPS_PROC_ID 1 #define QCOM_MUTEX_NUM_LOCKS 32 +struct qcom_hwspinlock_of_data { + u32 offset; + u32 stride; + const struct regmap_config *regmap_config; +}; + static int qcom_hwspinlock_trylock(struct hwspinlock *lock) { struct regmap_field *field = lock->priv; @@ -63,48 +69,120 @@ static const struct hwspinlock_ops qcom_hwspinlock_ops = { .unlock = qcom_hwspinlock_unlock, }; +static const struct qcom_hwspinlock_of_data of_sfpb_mutex = { + .offset = 0x4, + .stride = 0x4, +}; + +static const struct regmap_config tcsr_msm8226_mutex_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x1000, + .fast_io = true, +}; + +static const struct qcom_hwspinlock_of_data of_msm8226_tcsr_mutex = { + .offset = 0, + .stride = 0x80, + .regmap_config = &tcsr_msm8226_mutex_config, +}; + +static const struct regmap_config tcsr_mutex_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x20000, + .fast_io = true, +}; + +static const struct qcom_hwspinlock_of_data of_tcsr_mutex = { + .offset = 0, + .stride = 0x1000, + .regmap_config = &tcsr_mutex_config, +}; + static const struct of_device_id qcom_hwspinlock_of_match[] = { - { .compatible = "qcom,sfpb-mutex" }, - { .compatible = "qcom,tcsr-mutex" }, + { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex }, + { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex }, + { .compatible = "qcom,apq8084-tcsr-mutex", .data = &of_msm8226_tcsr_mutex }, + { .compatible = "qcom,ipq6018-tcsr-mutex", .data = &of_msm8226_tcsr_mutex }, + { .compatible = "qcom,msm8226-tcsr-mutex", .data = &of_msm8226_tcsr_mutex }, + { .compatible = "qcom,msm8974-tcsr-mutex", .data = &of_msm8226_tcsr_mutex }, + { .compatible = "qcom,msm8994-tcsr-mutex", .data = &of_msm8226_tcsr_mutex }, { } }; MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); -static int qcom_hwspinlock_probe(struct platform_device *pdev) +static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev, + u32 *base, u32 *stride) { - struct hwspinlock_device *bank; struct device_node *syscon; - struct reg_field field; struct regmap *regmap; - size_t array_size; - u32 stride; - u32 base; int ret; - int i; syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); - if (!syscon) { - dev_err(&pdev->dev, "no syscon property\n"); - return -ENODEV; - } + if (!syscon) + return ERR_PTR(-ENODEV); regmap = syscon_node_to_regmap(syscon); of_node_put(syscon); if (IS_ERR(regmap)) - return PTR_ERR(regmap); + return regmap; - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base); + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base); if (ret < 0) { dev_err(&pdev->dev, "no offset in syscon\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride); + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride); if (ret < 0) { dev_err(&pdev->dev, "no stride syscon\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } + return regmap; +} + +static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev, + u32 *offset, u32 *stride) +{ + const struct qcom_hwspinlock_of_data *data; + struct device *dev = &pdev->dev; + void __iomem *base; + + data = of_device_get_match_data(dev); + if (!data->regmap_config) + return ERR_PTR(-EINVAL); + + *offset = data->offset; + *stride = data->stride; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return ERR_CAST(base); + + return devm_regmap_init_mmio(dev, base, data->regmap_config); +} + +static int qcom_hwspinlock_probe(struct platform_device *pdev) +{ + struct hwspinlock_device *bank; + struct reg_field field; + struct regmap *regmap; + size_t array_size; + u32 stride; + u32 base; + int i; + + regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride); + if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV) + regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride); + + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL); if (!bank) diff --git a/drivers/hwspinlock/sirf_hwspinlock.c b/drivers/hwspinlock/sirf_hwspinlock.c deleted file mode 100644 index 823d3c4f621e..000000000000 --- a/drivers/hwspinlock/sirf_hwspinlock.c +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SIRF hardware spinlock driver - * - * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/device.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/hwspinlock.h> -#include <linux/platform_device.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#include "hwspinlock_internal.h" - -struct sirf_hwspinlock { - void __iomem *io_base; - struct hwspinlock_device bank; -}; - -/* Number of Hardware Spinlocks*/ -#define HW_SPINLOCK_NUMBER 30 - -/* Hardware spinlock register offsets */ -#define HW_SPINLOCK_BASE 0x404 -#define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x)) - -static int sirf_hwspinlock_trylock(struct hwspinlock *lock) -{ - void __iomem *lock_addr = lock->priv; - - /* attempt to acquire the lock by reading value == 1 from it */ - return !!readl(lock_addr); -} - -static void sirf_hwspinlock_unlock(struct hwspinlock *lock) -{ - void __iomem *lock_addr = lock->priv; - - /* release the lock by writing 0 to it */ - writel(0, lock_addr); -} - -static const struct hwspinlock_ops sirf_hwspinlock_ops = { - .trylock = sirf_hwspinlock_trylock, - .unlock = sirf_hwspinlock_unlock, -}; - -static int sirf_hwspinlock_probe(struct platform_device *pdev) -{ - struct sirf_hwspinlock *hwspin; - struct hwspinlock *hwlock; - int idx; - - if (!pdev->dev.of_node) - return -ENODEV; - - hwspin = devm_kzalloc(&pdev->dev, - struct_size(hwspin, bank.lock, - HW_SPINLOCK_NUMBER), - GFP_KERNEL); - if (!hwspin) - return -ENOMEM; - - /* retrieve io base */ - hwspin->io_base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(hwspin->io_base)) - return PTR_ERR(hwspin->io_base); - - for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) { - hwlock = &hwspin->bank.lock[idx]; - hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx); - } - - platform_set_drvdata(pdev, hwspin); - - return devm_hwspin_lock_register(&pdev->dev, &hwspin->bank, - &sirf_hwspinlock_ops, 0, - HW_SPINLOCK_NUMBER); -} - -static const struct of_device_id sirf_hwpinlock_ids[] = { - { .compatible = "sirf,hwspinlock", }, - {}, -}; -MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids); - -static struct platform_driver sirf_hwspinlock_driver = { - .probe = sirf_hwspinlock_probe, - .driver = { - .name = "atlas7_hwspinlock", - .of_match_table = of_match_ptr(sirf_hwpinlock_ids), - }, -}; - -module_platform_driver(sirf_hwspinlock_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("SIRF Hardware spinlock driver"); -MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>"); diff --git a/drivers/hwspinlock/sprd_hwspinlock.c b/drivers/hwspinlock/sprd_hwspinlock.c index 36dc8038bbb4..22e2ffb91743 100644 --- a/drivers/hwspinlock/sprd_hwspinlock.c +++ b/drivers/hwspinlock/sprd_hwspinlock.c @@ -4,7 +4,6 @@ * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com */ -#include <linux/bitops.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> @@ -15,7 +14,6 @@ #include <linux/of.h> #include <linux/of_device.h> #include <linux/platform_device.h> -#include <linux/slab.h> #include "hwspinlock_internal.h" @@ -95,8 +93,7 @@ static int sprd_hwspinlock_probe(struct platform_device *pdev) return -ENODEV; sprd_hwlock = devm_kzalloc(&pdev->dev, - sizeof(struct sprd_hwspinlock_dev) + - SPRD_HWLOCKS_NUM * sizeof(*lock), + struct_size(sprd_hwlock, bank.lock, SPRD_HWLOCKS_NUM), GFP_KERNEL); if (!sprd_hwlock) return -ENOMEM; @@ -148,21 +145,10 @@ static struct platform_driver sprd_hwspinlock_driver = { .probe = sprd_hwspinlock_probe, .driver = { .name = "sprd_hwspinlock", - .of_match_table = of_match_ptr(sprd_hwspinlock_of_match), + .of_match_table = sprd_hwspinlock_of_match, }, }; - -static int __init sprd_hwspinlock_init(void) -{ - return platform_driver_register(&sprd_hwspinlock_driver); -} -postcore_initcall(sprd_hwspinlock_init); - -static void __exit sprd_hwspinlock_exit(void) -{ - platform_driver_unregister(&sprd_hwspinlock_driver); -} -module_exit(sprd_hwspinlock_exit); +module_platform_driver(sprd_hwspinlock_driver); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Hardware spinlock driver for Spreadtrum"); diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c index 3ad0ce0da4d9..bb5c7e5f7a80 100644 --- a/drivers/hwspinlock/stm32_hwspinlock.c +++ b/drivers/hwspinlock/stm32_hwspinlock.c @@ -54,53 +54,68 @@ static const struct hwspinlock_ops stm32_hwspinlock_ops = { .relax = stm32_hwspinlock_relax, }; +static void stm32_hwspinlock_disable_clk(void *data) +{ + struct platform_device *pdev = data; + struct stm32_hwspinlock *hw = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + + pm_runtime_get_sync(dev); + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); + + clk_disable_unprepare(hw->clk); +} + static int stm32_hwspinlock_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct stm32_hwspinlock *hw; void __iomem *io_base; - size_t array_size; int i, ret; io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(io_base)) return PTR_ERR(io_base); - array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); - hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL); + hw = devm_kzalloc(dev, struct_size(hw, bank.lock, STM32_MUTEX_NUM_LOCKS), GFP_KERNEL); if (!hw) return -ENOMEM; - hw->clk = devm_clk_get(&pdev->dev, "hsem"); + hw->clk = devm_clk_get(dev, "hsem"); if (IS_ERR(hw->clk)) return PTR_ERR(hw->clk); - for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++) - hw->bank.lock[i].priv = io_base + i * sizeof(u32); + ret = clk_prepare_enable(hw->clk); + if (ret) { + dev_err(dev, "Failed to prepare_enable clock\n"); + return ret; + } platform_set_drvdata(pdev, hw); - pm_runtime_enable(&pdev->dev); - ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops, - 0, STM32_MUTEX_NUM_LOCKS); + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_put(dev); - if (ret) - pm_runtime_disable(&pdev->dev); + ret = devm_add_action_or_reset(dev, stm32_hwspinlock_disable_clk, pdev); + if (ret) { + dev_err(dev, "Failed to register action\n"); + return ret; + } - return ret; -} + for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++) + hw->bank.lock[i].priv = io_base + i * sizeof(u32); -static int stm32_hwspinlock_remove(struct platform_device *pdev) -{ - struct stm32_hwspinlock *hw = platform_get_drvdata(pdev); - int ret; + ret = devm_hwspin_lock_register(dev, &hw->bank, &stm32_hwspinlock_ops, + 0, STM32_MUTEX_NUM_LOCKS); - ret = hwspin_lock_unregister(&hw->bank); if (ret) - dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret); - - pm_runtime_disable(&pdev->dev); + dev_err(dev, "Failed to register hwspinlock\n"); - return 0; + return ret; } static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev) @@ -135,7 +150,6 @@ MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids); static struct platform_driver stm32_hwspinlock_driver = { .probe = stm32_hwspinlock_probe, - .remove = stm32_hwspinlock_remove, .driver = { .name = "stm32_hwspinlock", .of_match_table = stm32_hwpinlock_ids, diff --git a/drivers/hwspinlock/sun6i_hwspinlock.c b/drivers/hwspinlock/sun6i_hwspinlock.c new file mode 100644 index 000000000000..c2d314588046 --- /dev/null +++ b/drivers/hwspinlock/sun6i_hwspinlock.c @@ -0,0 +1,210 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * sun6i_hwspinlock.c - hardware spinlock driver for sun6i compatible Allwinner SoCs + * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net> + */ + +#include <linux/clk.h> +#include <linux/debugfs.h> +#include <linux/errno.h> +#include <linux/hwspinlock.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/reset.h> +#include <linux/slab.h> +#include <linux/spinlock.h> +#include <linux/types.h> + +#include "hwspinlock_internal.h" + +#define DRIVER_NAME "sun6i_hwspinlock" + +#define SPINLOCK_BASE_ID 0 /* there is only one hwspinlock device per SoC */ +#define SPINLOCK_SYSSTATUS_REG 0x0000 +#define SPINLOCK_LOCK_REGN 0x0100 +#define SPINLOCK_NOTTAKEN 0 + +struct sun6i_hwspinlock_data { + struct hwspinlock_device *bank; + struct reset_control *reset; + struct clk *ahb_clk; + struct dentry *debugfs; + int nlocks; +}; + +#ifdef CONFIG_DEBUG_FS + +static int hwlocks_supported_show(struct seq_file *seqf, void *unused) +{ + struct sun6i_hwspinlock_data *priv = seqf->private; + + seq_printf(seqf, "%d\n", priv->nlocks); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(hwlocks_supported); + +static void sun6i_hwspinlock_debugfs_init(struct sun6i_hwspinlock_data *priv) +{ + priv->debugfs = debugfs_create_dir(DRIVER_NAME, NULL); + debugfs_create_file("supported", 0444, priv->debugfs, priv, &hwlocks_supported_fops); +} + +#else + +static void sun6i_hwspinlock_debugfs_init(struct sun6i_hwspinlock_data *priv) +{ +} + +#endif + +static int sun6i_hwspinlock_trylock(struct hwspinlock *lock) +{ + void __iomem *lock_addr = lock->priv; + + return (readl(lock_addr) == SPINLOCK_NOTTAKEN); +} + +static void sun6i_hwspinlock_unlock(struct hwspinlock *lock) +{ + void __iomem *lock_addr = lock->priv; + + writel(SPINLOCK_NOTTAKEN, lock_addr); +} + +static const struct hwspinlock_ops sun6i_hwspinlock_ops = { + .trylock = sun6i_hwspinlock_trylock, + .unlock = sun6i_hwspinlock_unlock, +}; + +static void sun6i_hwspinlock_disable(void *data) +{ + struct sun6i_hwspinlock_data *priv = data; + + debugfs_remove_recursive(priv->debugfs); + clk_disable_unprepare(priv->ahb_clk); + reset_control_assert(priv->reset); +} + +static int sun6i_hwspinlock_probe(struct platform_device *pdev) +{ + struct sun6i_hwspinlock_data *priv; + struct hwspinlock *hwlock; + void __iomem *io_base; + u32 num_banks; + int err, i; + + io_base = devm_platform_ioremap_resource(pdev, SPINLOCK_BASE_ID); + if (IS_ERR(io_base)) + return PTR_ERR(io_base); + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->ahb_clk = devm_clk_get(&pdev->dev, "ahb"); + if (IS_ERR(priv->ahb_clk)) { + err = PTR_ERR(priv->ahb_clk); + dev_err(&pdev->dev, "unable to get AHB clock (%d)\n", err); + return err; + } + + priv->reset = devm_reset_control_get(&pdev->dev, "ahb"); + if (IS_ERR(priv->reset)) + return dev_err_probe(&pdev->dev, PTR_ERR(priv->reset), + "unable to get reset control\n"); + + err = reset_control_deassert(priv->reset); + if (err) { + dev_err(&pdev->dev, "deassert reset control failure (%d)\n", err); + return err; + } + + err = clk_prepare_enable(priv->ahb_clk); + if (err) { + dev_err(&pdev->dev, "unable to prepare AHB clk (%d)\n", err); + goto clk_fail; + } + + /* + * bit 28 and 29 represents the hwspinlock setup + * + * every datasheet (A64, A80, A83T, H3, H5, H6 ...) says the default value is 0x1 and 0x1 + * to 0x4 represent 32, 64, 128 and 256 locks + * but later datasheets (H5, H6) say 00, 01, 10, 11 represent 32, 64, 128 and 256 locks, + * but that would mean H5 and H6 have 64 locks, while their datasheets talk about 32 locks + * all the time, not a single mentioning of 64 locks + * the 0x4 value is also not representable by 2 bits alone, so some datasheets are not + * correct + * one thing have all in common, default value of the sysstatus register is 0x10000000, + * which results in bit 28 being set + * this is the reason 0x1 is considered being 32 locks and bit 30 is taken into account + * verified on H2+ (datasheet 0x1 = 32 locks) and H5 (datasheet 01 = 64 locks) + */ + num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28; + switch (num_banks) { + case 1 ... 4: + priv->nlocks = 1 << (4 + num_banks); + break; + default: + err = -EINVAL; + dev_err(&pdev->dev, "unsupported hwspinlock setup (%d)\n", num_banks); + goto bank_fail; + } + + priv->bank = devm_kzalloc(&pdev->dev, struct_size(priv->bank, lock, priv->nlocks), + GFP_KERNEL); + if (!priv->bank) { + err = -ENOMEM; + goto bank_fail; + } + + for (i = 0; i < priv->nlocks; ++i) { + hwlock = &priv->bank->lock[i]; + hwlock->priv = io_base + SPINLOCK_LOCK_REGN + sizeof(u32) * i; + } + + /* failure of debugfs is considered non-fatal */ + sun6i_hwspinlock_debugfs_init(priv); + if (IS_ERR(priv->debugfs)) + priv->debugfs = NULL; + + err = devm_add_action_or_reset(&pdev->dev, sun6i_hwspinlock_disable, priv); + if (err) { + dev_err(&pdev->dev, "failed to add hwspinlock disable action\n"); + goto bank_fail; + } + + platform_set_drvdata(pdev, priv); + + return devm_hwspin_lock_register(&pdev->dev, priv->bank, &sun6i_hwspinlock_ops, + SPINLOCK_BASE_ID, priv->nlocks); + +bank_fail: + clk_disable_unprepare(priv->ahb_clk); +clk_fail: + reset_control_assert(priv->reset); + + return err; +} + +static const struct of_device_id sun6i_hwspinlock_ids[] = { + { .compatible = "allwinner,sun6i-a31-hwspinlock", }, + {}, +}; +MODULE_DEVICE_TABLE(of, sun6i_hwspinlock_ids); + +static struct platform_driver sun6i_hwspinlock_driver = { + .probe = sun6i_hwspinlock_probe, + .driver = { + .name = DRIVER_NAME, + .of_match_table = sun6i_hwspinlock_ids, + }, +}; +module_platform_driver(sun6i_hwspinlock_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("SUN6I hardware spinlock driver"); +MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>"); |