diff options
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/ti_am335x_tscadc.c | 39 |
1 files changed, 14 insertions, 25 deletions
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index 01c2b7d1c18c..df4f905a7b52 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -121,7 +121,7 @@ static int ti_tscadc_probe(struct platform_device *pdev) struct property *prop; const __be32 *cur; u32 val; - int err, ctrl; + int err; int tsc_wires = 0, adc_channels = 0, cell_idx = 0, total_channels; int readouts = 0; @@ -217,22 +217,25 @@ static int ti_tscadc_probe(struct platform_device *pdev) tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1; regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); - /* Set the control register bits */ - ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; + /* + * Set the control register bits. tscadc->ctrl stores the configuration + * of the CTRL register but not the subsystem enable bit which must be + * added manually when timely. + */ + tscadc->ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; if (tsc_wires > 0) { - tscadc->tsc_wires = tsc_wires; + tscadc->ctrl |= CNTRLREG_TSCENB; if (tsc_wires == 5) - ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; + tscadc->ctrl |= CNTRLREG_5WIRE; else - ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; + tscadc->ctrl |= CNTRLREG_4WIRE; } - regmap_write(tscadc->regmap, REG_CTRL, ctrl); + regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); tscadc_idle_config(tscadc); /* Enable the TSC module enable bit */ - ctrl |= CNTRLREG_TSCSSENB; - regmap_write(tscadc->regmap, REG_CTRL, ctrl); + regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB); /* TSC Cell */ if (tsc_wires > 0) { @@ -307,27 +310,13 @@ static int __maybe_unused tscadc_suspend(struct device *dev) static int __maybe_unused tscadc_resume(struct device *dev) { struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); - u32 ctrl; pm_runtime_get_sync(dev); - /* context restore */ regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); - - ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; - if (tscadc->tsc_wires > 0) { - if (tscadc->tsc_wires == 5) - ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; - else - ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; - } - - regmap_write(tscadc->regmap, REG_CTRL, ctrl); - + regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); tscadc_idle_config(tscadc); - - ctrl |= CNTRLREG_TSCSSENB; - regmap_write(tscadc->regmap, REG_CTRL, ctrl); + regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB); return 0; } |